CY

Chih-Chao Yang

IBM: 78 patents #16 of 11,274Top 1%
TE Tessera: 3 patents #7 of 99Top 8%
ET Elpis Technologies: 1 patents #18 of 95Top 20%
Overall (2020): #105 of 565,922Top 1%
82
Patents 2020

Issued Patents 2020

Showing 25 most recent of 82 patents

Patent #TitleCo-InventorsDate
10879190 Patterning integration scheme with trench alignment marks Hao Tang, Dominik Metzler, Cornelius Brown Peethala 2020-12-29
10847475 Advanced crack stop structure Baozhen Li, Xiao Hu Liu, Griselda Bonilla 2020-11-24
10847458 BEOL electrical fuse and method of forming the same Baozhen Li 2020-11-24
10840195 Advanced crack stop structure Baozhen Li, Xiao Hu Liu, Griselda Bonilla 2020-11-17
10840447 Fabrication of phase change memory cell in integrated circuit Baozhen Li, Andrew Tae Kim, Barry P. Linder 2020-11-17
10840194 Advanced crack stop structure Baozhen Li, Xiao Hu Liu, Griselda Bonilla 2020-11-17
10840325 Low resistance metal-insulator-metal capacitor electrode Joseph F. Maniscalco, Koichi Motoyama, Oscar van der Straten 2020-11-17
10833266 Resistive memory crossbar array with ruthenium protection layer Takashi Ando, Lawrence A. Clevenger, Michael Rizzolo 2020-11-10
10833257 Formation of embedded magnetic random-access memory devices with multi-level bottom electrode via contacts Ashim Dutta, John C. Arnold, Theodorus E. Standaert 2020-11-10
10833127 Three-dimensional and planar memory device co-integration Takashi Ando, Michael Rizzolo, Lawrence A. Clevenger 2020-11-10
10832963 Forming gate contact over active free of metal recess Kangguo Cheng 2020-11-10
10833258 MRAM device formation with in-situ encapsulation Ashim Dutta, Daniel C. Edelstein, Karthik Yogendra, John C. Arnold 2020-11-10
10833007 Circular ring shape fuse device 2020-11-10
10825792 Metal bonding pads for packaging applications 2020-11-03
10818548 Method and structure for cost effective enhanced self-aligned contacts Kafai Lai, Yongan Xu, Su Chen Fan 2020-10-27
10818589 Metal interconnect structures with self-forming sidewall barrier layer Hari Prasad Amanapu, Cornelius Brown Peethala, Raghuveer Patiolla 2020-10-27
10811599 Co-fabrication of magnetic device structures with electrical interconnects having reduced resistance through increased conductor grain size Lawrence A. Clevenger, Liying Jiang, Sebastian Naczas, Michael Rizzolo 2020-10-20
10811353 Sub-ground rule e-Fuse structure Baozhen Li, Andrew Tae Kim, Ernest Y. Wu 2020-10-20
10804147 Semiconductor device with reduced via resistance Conal E. Murray 2020-10-13
10796911 Hardmask stress, grain, and structure engineering for advanced memory applications Michael Rizzolo, Ashim Dutta, Oscar van der Straten 2020-10-06
10790445 Protuberant contacts for resistive switching devices Takashi Ando, Lawrence A. Clevenger 2020-09-29
10784159 Semiconductor device and method of forming the semiconductor device Lawrence A. Clevenger, Baozhen Li, Kirk D. Peterson, John E. Sheets, II, Junli Wang 2020-09-22
10777735 Contact via structures Daniel C. Edelstein, Bruce B. Doris, Henry K. Utomo, Theodorus E. Standaert, Nathan P. Marchack 2020-09-15
10770395 Silicon carbide and silicon nitride interconnects 2020-09-08
10770393 BEOL thin film resistor Andrew Tae Kim, Baozhen Li, Ernest Y. Wu 2020-09-08