DE

Daniel C. Edelstein

IBM: 10 patents #465 of 11,274Top 5%
TE Tessera: 3 patents #7 of 99Top 8%
Overall (2020): #5,475 of 565,922Top 1%
13
Patents 2020

Issued Patents 2020

Patent #TitleCo-InventorsDate
10833258 MRAM device formation with in-situ encapsulation Ashim Dutta, Chih-Chao Yang, Karthik Yogendra, John C. Arnold 2020-11-10
10777735 Contact via structures Chih-Chao Yang, Bruce B. Doris, Henry K. Utomo, Theodorus E. Standaert, Nathan P. Marchack 2020-09-15
10770347 Interconnect structure Son V. Nguyen, Takeshi Nogami, Deepika Priyadarshini, Hosadurga Shobha 2020-09-08
10714683 Multilayer hardmask for high performance MRAM devices Michael Rizzolo, Theodorus E. Standaert, Kisup Chung, Isabel Cristina Chu, John C. Arnold 2020-07-14
10686124 Contact via structures Chih-Chao Yang, Bruce B. Doris, Henry K. Utomo, Theodorus E. Standaert, Nathan P. Marchack 2020-06-16
10680169 Multilayer hardmask for high performance MRAM devices Michael Rizzolo, Theodorus E. Standaert, Kisup Chung, Isabel Cristina Chu, John C. Arnold 2020-06-09
10643890 Ultrathin multilayer metal alloy liner for nano Cu interconnects Alfred Grill, Seth L. Knupp, Son V. Nguyen, Takeshi Nogami, Vamsi K. Paruchuri +2 more 2020-05-05
10615074 Advanced copper interconnects with hybrid microstructure Chih-Chao Yang 2020-04-07
10607933 Interconnect structures with fully aligned vias Nicholas C. M. Fuller, Elbert E. Huang, Satyanarayana V. Nitta, David L. Rath 2020-03-31
10593591 Interconnect structure Son V. Nguyen, Takeshi Nogami, Deepika Priyadarshini, Hosadurga Shobha 2020-03-17
10586921 Forming self-aligned contacts on pillar structures Anthony J. Annunziata, Eugene J. O'Sullivan, Henry K. Utomo 2020-03-10
10586920 Forming self-aligned contacts on pillar structures Anthony J. Annunziata, Eugene J. O'Sullivan, Henry K. Utomo 2020-03-10
10559751 Bottom electrode for semiconductor memory device Chih-Chao Yang, Theodorus E. Standaert 2020-02-11