KP

Kirk D. Peterson

IBM: 11 patents #406 of 11,274Top 4%
ET Elpis Technologies: 1 patents #18 of 95Top 20%
Globalfoundries: 1 patents #224 of 583Top 40%
📍 Jericho, VT: #3 of 28 inventorsTop 15%
🗺 Vermont: #7 of 515 inventorsTop 2%
Overall (2020): #5,191 of 565,922Top 1%
13
Patents 2020

Issued Patents 2020

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDate
10833025 Compressive zone to reduce dicing defects Thomas A. Wassick, Nicolas Pizzuti, Thomas M. Shaw 2020-11-10
10784159 Semiconductor device and method of forming the semiconductor device Lawrence A. Clevenger, Baozhen Li, John E. Sheets, II, Junli Wang, Chih-Chao Yang 2020-09-22
10768226 Testing mechanism for a proximity fail probability of defects across integrated chips Alain G. Rwabukamba, Andrew A. Turner 2020-09-08
10740177 Optimizing error correcting code in three-dimensional stacked memory Saravanan Sethuraman, Diyanesh B. Chinnakkonda Vidyapoornachary, Sridhar H. Rangarajan, John Bradley Deforge 2020-08-11
10712498 Shielding structures between optical waveguides John J. Ellis-Monaghan, Jeffrey P. Gambino, Mark D. Jaffe, Jed H. Rankin 2020-07-14
10699950 Method of optimizing wire RC for device performance and reliability Lawrence A. Clevenger, Baozhen Li, John E. Sheets, II, Terry A. Spooner 2020-06-30
10636750 Step pyramid shaped structure to reduce dicing defects Shidong Li, Nicolas Pizzuti, Thomas M. Shaw, Thomas A. Wassick 2020-04-28
10636738 Contacts having a geometry to reduce resistance Lawrence A. Clevenger, Baozhen Li, Terry A. Spooner, Junli Wang 2020-04-28
10622506 Photodiode structures John J. Ellis-Monaghan, Jeffrey P. Gambino, Mark D. Jaffe 2020-04-14
10615302 Photodiode structures John J. Ellis-Monaghan, Jeffrey P. Gambino, Mark D. Jaffe 2020-04-07
10580730 Managed integrated circuit power supply distribution Anthony Gus Aipperspach, Jeffrey Douglas Brown, John E. Sheets, II 2020-03-03
10534545 Three-dimensional stacked memory optimizations for latency and power Diyanesh B. Chinnakkonda Vidyapoornachary, John Bradley Deforge, Warren E. Maule, Sridhar H. Rangarajan, Saravanan Sethuraman 2020-01-14
10528288 Three-dimensional stacked memory access optimization Diyanesh B. Chinnakkonda Vidyapoornachary, John Bradley Deforge, Warren E. Maule, Sridhar H. Rangarajan, Saravanan Sethuraman 2020-01-07