Issued Patents 2020
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10832946 | Recessed interconnet line having a low-oxygen cap for facilitating a robust planarization process and protecting the interconnect line from downstream etch operations | Samuel S. Choi | 2020-11-10 |
| 10833122 | Bottom electrode and dielectric structure for MRAM applications | Raghuveer R. Patlolla, Cornelius Brown Peethala, Michael Rizzolo | 2020-11-10 |
| 10833173 | Low-resistance top contact on VTFET | Christopher J. Waskiewicz, Su Chen Fan, Hemanth Jagannathan | 2020-11-10 |
| 10818589 | Metal interconnect structures with self-forming sidewall barrier layer | Cornelius Brown Peethala, Raghuveer Patiolla, Chih-Chao Yang | 2020-10-27 |
| 10559530 | Forming dual metallization interconnect structures in single metallization level | Charan V. Surisetty, Raghuveer R. Patlolla | 2020-02-11 |