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Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Niloy Mukherjee — 32 Patents in 2017

Intel: 29 patents #22 of 5,604Top 1%
Oracle: 3 patents #96 of 1,681Top 6%
San Ramon, CA: #3 of 465 inventorsTop 1%
California: #117 of 60,394 inventorsTop 1%
Overall (2017): #546 of 506,227Top 1%
32 Patents 2017

Issued Patents 2017

Showing 1–25 of 32 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9818870 Transistor structure with variable clad/core dimension for stress and bandgap Willy Rachmady, Van H. Le, Ravi Pillarisetty, Marko Radosavljevic, Gilbert Dewey +4 more 2017-11-14 $11,178,000
9812574 Techniques and configurations for stacking transistors of an integrated circuit device Ravi Pillarisetty, Charles C. Kuo, Han Wui Then, Gilbert Dewey, Willy Rachmady +3 more 2017-11-07 $13,901,000
9799759 Techniques for forming non-planar germanium quantum well devices Ravi Pillarisetty, Jack T. Kavalieros, Willy Rachmady, Uday Shah, Benjamin Chu-Kung +4 more 2017-10-24 $10,797,000
9768269 Fermi-level unpinning structures for semiconductive devices, processes of forming same, and systems containing same Gilbert Dewey, Matthew V. Metz, Jack T. Kavalieros, Nancy Zelick, Robert S. Chau 2017-09-19 $8,005,000
9755062 III-N material structure for gate-recessed transistors Han Wui Then, Marko Radosavljevic, Uday Shah, Ravi Pillarisetty, Benjamin Chu-Kung +2 more 2017-09-05 $9,844,000
9748338 Preventing isolation leakage in III-V devices Gilbert Dewey, Marko Radosavljevic, Ravi Pillarisetty, Benjamin Chu-Kung 2017-08-29 $8,286,000
9748371 Transition metal dichalcogenide semiconductor assemblies Marko Radosavljevic, Brian S. Doyle, Ravi Pillarisetty, Sansaptak Dasgupta, Han Wui Then +1 more 2017-08-29 $8,286,000
9711591 Methods of forming hetero-layers with reduced surface roughness and bulk defect density of non-native surfaces and the structures formed thereby Matthew V. Metz, James M. Powers, Van H. Le, Benjamin Chu-Kung, Mark R. Lemay +6 more 2017-07-18 $6,909,000
9704981 Techniques for forming contacts to quantum well transistors Ravi Pillarisetty, Benjamin Chu-Kung, Mantu K. Hudait, Marko Radosavljevic, Jack T. Kavalieros +2 more 2017-07-11 $8,311,000
9698265 Strained channel region transistors employing source and drain stressors and systems including the same Van H. Le, Harold W. Kennel, Willy Rachmady, Ravi Pillarisetty, Jack T. Kavalieros 2017-07-04
9698013 Methods and structures to prevent sidewall defects during selective epitaxy Niti Goel, Sanaz K. Gardner, Pragyansri Pathi, Matthew V. Metz, Sansaptak Dasgupta +6 more 2017-07-04
9691857 Group III-N nanowire transistors Han Wui Then, Robert S. Chau, Benjamin Chu-Kung, Gilbert Dewey, Jack T. Kavalieros +3 more 2017-06-27 $7,334,000
9685381 Integrating VLSI-compatible fin structures with selective epitaxial growth and fabricating devices thereon Niti Goel, Ravi Pillarisetty, Willy Rachmady, Jack T. Kavalieros, Gilbert Dewey +4 more 2017-06-20 $9,273,000
9685508 High voltage field effect transistors Han Wui Then, Robert S. Chau, Benjamin Chu-Kung, Gilbert Dewey, Jack T. Kavalieros +3 more 2017-06-20 $9,273,000
9684682 Sharding of in-memory objects across NUMA nodes Amit Ganesh, Vineet Marwah 2017-06-20 $129,509,000
9666583 Methods of containing defects for non-silicon device engineering Niti Goel, Ravi Pillarisetty, Robert S. Chau, Willy Rachmady, Matthew V. Metz +6 more 2017-05-30 $12,187,000
9666492 CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture Marko Radosavljevic, Ravi Pillarisetty, Gilbert Dewey, Jack T. Kavalieros, Willy Rachmady +4 more 2017-05-30 $12,187,000
9653548 Non-planar semiconductor device having group III-V material active region with multi-dielectric gate stack Gilbert Dewey, Marko Radosavljevic, Ravi Pillarisetty, Benjamin Chu-Kung 2017-05-16 $8,597,000
9653680 Techniques for filament localization, edge effect reduction, and forming/switching voltage reduction in RRAM devices Ravi Pillarisetty, Prashant Majhi, Uday Shah, Elijah V. Karpov, Brian S. Doyle +1 more 2017-05-16 $8,597,000
9653559 Methods to enhance doping concentration in near-surface layers of semiconductors and methods of making same Gilbert Dewey, Marko Radosavljevic, Niti Goel, Sanaz Kabehie, Matthew V. Metz +1 more 2017-05-16 $8,597,000
9645928 Distributed directory service for in-memory compression unit home location Amit Ganesh, Vineet Marwah 2017-05-09 $37,470,000
9640537 Non-silicon device heterolayers on patterned silicon substrate for CMOS by combination of selective and conformal epitaxy Niti Goel, Robert S. Chau, Jack T. Kavalieros, Benjamin Chu-Kung, Matthew V. Metz +7 more 2017-05-02 $12,076,000
9640671 Deep gate-all-around semiconductor device having germanium or group III-V active layer Ravi Pillarisetty, Willy Rachmady, Van H. Le, Seung Hoon Sung, Jessica S. Kachian +5 more 2017-05-02 $12,076,000
9640622 Selective epitaxially grown III-V materials based devices Niti Goel, Gilbert Dewey, Matthew V. Metz, Marko Radosavljevic, Benjamin Chu-Kung +2 more 2017-05-02 $12,076,000
9634007 Trench confined epitaxially grown device layer(s) Ravi Pillarisetty, Seung Hoon Sung, Niti Goel, Jack T. Kavalieros, Sansaptak Dasgupta +7 more 2017-04-25 $8,972,000