Issued Patents 2017
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9853107 | Selective epitaxially grown III-V materials based devices | Matthew V. Metz, Jack T. Kavalieros, Gilbert Dewey, Willy Rachmady, Marko Radosavljevic +3 more | 2017-12-26 |
| 9847448 | Forming LED structures on silicon fins | Sansaptak Dasgupta, Han Wui Then, Robert S. Chau, Marko Radosavljevic, Sanaz K. Gardner | 2017-12-19 |
| 9847432 | Forming III-V device structures on (111) planes of silicon fins | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Marko Radosavljevic, Seung Hoon Sung +1 more | 2017-12-19 |
| 9818884 | Strain compensation in transistors | Van H. Le, Jack T. Kavalieros, Ravi Pillarisetty, Willy Rachmady, Harold W. Kennel | 2017-11-14 |
| 9818870 | Transistor structure with variable clad/core dimension for stress and bandgap | Willy Rachmady, Van H. Le, Ravi Pillarisetty, Marko Radosavljevic, Gilbert Dewey +4 more | 2017-11-14 |
| 9806203 | Nonplanar III-N transistors with compositionally graded semiconductor channels | Han Wui Then, Sansaptak Dasgupta, Marko Radosavljevic, Seung Hoon Sung, Sanaz K. Gardner +1 more | 2017-10-31 |
| 9799759 | Techniques for forming non-planar germanium quantum well devices | Ravi Pillarisetty, Jack T. Kavalieros, Willy Rachmady, Uday Shah, Marko Radosavljevic +4 more | 2017-10-24 |
| 9755062 | III-N material structure for gate-recessed transistors | Han Wui Then, Marko Radosavljevic, Uday Shah, Niloy Mukherjee, Ravi Pillarisetty +2 more | 2017-09-05 |
| 9748338 | Preventing isolation leakage in III-V devices | Gilbert Dewey, Marko Radosavljevic, Ravi Pillarisetty, Niloy Mukherjee | 2017-08-29 |
| 9716149 | Group III-N transistors on nanoscale template structures | Han Wui Then, Sansaptak Dasgupta, Marko Radosavljevic, Sanaz K. Gardner, Seung Hoon Sung +1 more | 2017-07-25 |
| 9711591 | Methods of forming hetero-layers with reduced surface roughness and bulk defect density of non-native surfaces and the structures formed thereby | Niloy Mukherjee, Matthew V. Metz, James M. Powers, Van H. Le, Mark R. Lemay +6 more | 2017-07-18 |
| 9704981 | Techniques for forming contacts to quantum well transistors | Ravi Pillarisetty, Mantu K. Hudait, Marko Radosavljevic, Jack T. Kavalieros, Willy Rachmady +2 more | 2017-07-11 |
| 9698013 | Methods and structures to prevent sidewall defects during selective epitaxy | Niloy Mukherjee, Niti Goel, Sanaz K. Gardner, Pragyansri Pathi, Matthew V. Metz +6 more | 2017-07-04 |
| 9698222 | Method of fabricating semiconductor structures on dissimilar substrates | Sherry R. Taft, Van H. Le, Sansaptak Dasgupta, Seung Hoon Sung, Sanaz K. Gardner +3 more | 2017-07-04 |
| 9691857 | Group III-N nanowire transistors | Han Wui Then, Robert S. Chau, Gilbert Dewey, Jack T. Kavalieros, Matthew V. Metz +3 more | 2017-06-27 |
| 9685508 | High voltage field effect transistors | Han Wui Then, Robert S. Chau, Gilbert Dewey, Jack T. Kavalieros, Matthew V. Metz +3 more | 2017-06-20 |
| 9685381 | Integrating VLSI-compatible fin structures with selective epitaxial growth and fabricating devices thereon | Niti Goel, Ravi Pillarisetty, Willy Rachmady, Jack T. Kavalieros, Gilbert Dewey +4 more | 2017-06-20 |
| 9673045 | Integration of III-V devices on Si wafers | Sansaptak Dasgupta, Han Wui Then, Seung Hoon Sung, Sanaz K. Gardner, Marko Radosavljevic +1 more | 2017-06-06 |
| 9666708 | III-N transistors with enhanced breakdown voltage | Han Wui Then, Sansaptak Dasgupta, Robert S. Chau, Seung Hoon Sung, Ravi Pillarisetty +1 more | 2017-05-30 |
| 9666583 | Methods of containing defects for non-silicon device engineering | Niti Goel, Ravi Pillarisetty, Niloy Mukherjee, Robert S. Chau, Willy Rachmady +6 more | 2017-05-30 |
| 9666492 | CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture | Marko Radosavljevic, Ravi Pillarisetty, Gilbert Dewey, Niloy Mukherjee, Jack T. Kavalieros +4 more | 2017-05-30 |
| 9660064 | Low sheet resistance GaN channel on Si substrates using InAlN and AlGaN bi-layer capping stack | Sansaptak Dasgupta, Han Wui Then, Marko Radosavljevic, Sanaz K. Gardner, Seung Hoon Sung +1 more | 2017-05-23 |
| 9660085 | Wide band gap transistors on non-native semiconductor substrates and methods of manufacture thereof | Han Wui Then, Robert S. Chau, Sansaptak Dasgupta, Marko Radosavljevic, Seung Hoon Sung +2 more | 2017-05-23 |
| 9653548 | Non-planar semiconductor device having group III-V material active region with multi-dielectric gate stack | Gilbert Dewey, Marko Radosavljevic, Ravi Pillarisetty, Niloy Mukherjee | 2017-05-16 |
| 9640422 | III-N devices in Si trenches | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Seung Hoon Sung, Marko Radosavljevic +3 more | 2017-05-02 |