Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
TS

Theodorus E. Standaert

IBM: 41 patents #44 of 10,852Top 1%
Globalfoundries: 4 patents #123 of 1,311Top 10%
SSStmicroelectronics Sa: 1 patents #48 of 135Top 40%
Clifton Park, NY: #2 of 208 inventorsTop 1%
New York: #23 of 12,278 inventorsTop 1%
Overall (2017): #280 of 506,227Top 1%
42 Patents 2017

Issued Patents 2017

Showing 26–42 of 42 patents

Patent #TitleCo-InventorsDate
9627373 CMOS compatible fuse or resistor using self-aligned contacts Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-04-18
9627377 Self-aligned dielectric isolation for FinFET devices Marc A. Bergendahl, Kangguo Cheng, David V. Horak, Ali Khakifirooz, Shom Ponoth +4 more 2017-04-18
9613869 FinFET devices Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-04-04
9607943 Capacitors Veeraraghavan S. Basker, Kangguo Cheng, Christopher J. Penny, Junli Wang 2017-03-28
9601378 Semiconductor fins for FinFET devices and sidewall image transfer (SIT) processes for manufacturing the same Veeraraghavan S. Basker, Kangguo Cheng 2017-03-21
9595578 Undercut insulating regions for silicon-on-insulator device Kangguo Cheng, Bruce B. Doris, Balasubramanian Pranatharthiharan, Shom Ponoth, Tenko Yamashita 2017-03-14
9576980 FinFET devices having gate dielectric structures with different thicknesses on same semiconductor structure Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-02-21
9576852 Integrated circuits with self aligned contacts and methods of manufacturing the same Ming He, Seowoo Nam, Yann Mignot, Jim Kelly, Raghuveer Patlotta 2017-02-21
9576096 Semiconductor structures including an integrated finFET with deep trench capacitor and methods of manufacture Kevin K. Chan, Sivananda K. Kanakasabapathy, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung +1 more 2017-02-21
9570591 Forming semiconductor device with close ground rules Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-02-14
9570571 Gate stack integrated metal resistors Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-02-14
9564437 Method and structure for forming FinFET CMOS with dual doped STI regions Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-02-07
9559009 Gate structure cut after formation of epitaxial active regions Xiuyu Cai, Kangguo Cheng, Johnathan E. Faltermeier, Ali Khakifirooz, Ruilong Xie 2017-01-31
9559014 Self-aligned punch through stopper liner for bulk FinFET Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-01-31
9558991 Formation of isolation surrounding well implantation Kangguo Cheng, Shom Ponoth, Tenko Yamashita 2017-01-31
9553088 Forming semiconductor device with close ground rules Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang 2017-01-24
9548243 Self aligned via and pillar cut for at least a self aligned double pitch Benjamin D. Briggs, Lawrence A. Clevenger, Michael Rizzolo, Terry A. Spooner 2017-01-17