| 9524986 |
Trapping dislocations in high-mobility fins below isolation layer |
Michael P. Chudzik, Judson R. Holt, Arvind Kumar, Unoh Kwon |
2016-12-20 |
| 9515140 |
Patterned strained semiconductor substrate and device |
Kangguo Cheng |
2016-12-06 |
| 9496258 |
Semiconductor fin isolation by a well trapping fin portion |
Henry K. Utomo, Kangguo Cheng, Ravikumar Ramachandran, Huiling Shang, Reinaldo Vega |
2016-11-15 |
| 9484347 |
FinFET CMOS with Si NFET and SiGe PFET |
Kangguo Cheng, Jeehwan Kim |
2016-11-01 |
| 9484267 |
Stacked nanowire devices |
Kangguo Cheng, Juntao Li |
2016-11-01 |
| 9472402 |
Methods and structures for protecting one area while processing another area on a chip |
Deok-kee Kim, Kenneth T. Settlemyer, Jr., Kangguo Cheng, Carl Radens, Dirk Pfeiffer +4 more |
2016-10-18 |
| 9455314 |
Y-FET with self-aligned punch-through-stop (PTS) doping |
Kangguo Cheng, Juntao Li |
2016-09-27 |
| 9431523 |
Local thinning of semiconductor fins |
Kangguo Cheng, Carl Radens |
2016-08-30 |
| 9425196 |
Multiple threshold voltage FinFETs |
Kangguo Cheng, Juntao Li, Fee Li Lie |
2016-08-23 |
| 9418903 |
Structure and method for effective device width adjustment in finFET devices using gate workfunction shift |
Arvind Kumar, Carl Radens |
2016-08-16 |
| 9397002 |
Self-aligned punchthrough stop doping in bulk finFET by reflowing doped oxide |
Michael P. Belyansky, Kangguo Cheng |
2016-07-19 |
| 9349730 |
Fin transformation process and isolation structures facilitating different Fin isolation schemes |
Ajey Poovannummoottil Jacob, Kangguo Cheng, Bruce B. Doris, Nicolas Loubet, Prasanna Khare |
2016-05-24 |
| 9312360 |
FinFET with epitaxial source and drain regions and dielectric isolated channel region |
Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek, Soon-Cheon Seo |
2016-04-12 |
| 9305930 |
Finfet crosspoint flash memory |
Arvind Kumar, Carl Radens |
2016-04-05 |
| 9263449 |
FinFET and fin-passive devices |
Kangguo Cheng, Ali Khakifirooz, Theodorus E. Standaert |
2016-02-16 |
| 9263454 |
Semiconductor structure having buried conductive elements |
Emre Alptekin, Pooja R. Batra, Kangguo Cheng, Johnathan E. Faltermeier, Reinaldo Vega |
2016-02-16 |
| 9245892 |
Semiconductor structure having buried conductive elements |
Emre Alptekin, Pooja R. Batra, Kangguo Cheng, Johnathan E. Faltermeier, Reinaldo Vega |
2016-01-26 |
| 9245981 |
Dielectric filler fins for planar topography in gate level |
Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Edward J. Nowak, Kern Rim |
2016-01-26 |
| 9236389 |
Embedded flash memory fabricated in standard CMOS process with self-aligned contact |
Kangguo Cheng, Subramanian S. Iyer, Ali Khakifirooz |
2016-01-12 |
