Issued Patents 2016
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9530684 | Method and structure to suppress finFET heating | Viraj Y. Sardesai, Cung D. Tran, Reinaldo Vega | 2016-12-27 |
| 9515168 | Fin end spacer for preventing merger of raised active regions | Sameer H. Jain, Viraj Y. Sardesai, Cung D. Tran, Reinaldo Vega | 2016-12-06 |
| 9514992 | Unidirectional spacer in trench silicide | Sameer H. Jain, Unoh Kwon, Zhengwen Li, Hari V. Mallela, Ayse M. Ozbek +3 more | 2016-12-06 |
| 9496362 | Contact first replacement metal gate | Ravikumar Ramachandran, Viraj Y. Sardesai | 2016-11-15 |
| 9496368 | Partial spacer for increasing self aligned contact process margins | Ravikumar Ramachandran, Viraj Y. Sardesai, Reinaldo Vega | 2016-11-15 |
| 9472415 | Directional chemical oxide etch technique | Sivananda K. Kanakasabapathy, Ahmet S. Ozcan, Viraj Y. Sardesai, Cung D. Tran | 2016-10-18 |
| 9472406 | Metal semiconductor alloy contact resistance improvement | Nicolas L. Breil, Christian Lavoie, Ahmet S. Ozcan, Kathryn T. Schonenberg | 2016-10-18 |
| 9466693 | Self aligned replacement metal source/drain finFET | Robert R. Robison, Reinaldo Vega | 2016-10-11 |
| 9449827 | Metal semiconductor alloy contact resistance improvement | Nicolas L. Breil, Christian Lavoie, Ahmet S. Ozcan, Kathryn T. Schonenberg | 2016-09-20 |
| 9443772 | Diffusion-controlled semiconductor contact creation | Nicolas L. Breil, Christian Lavoie, Ahmet S. Ozcan, Kathryn T. Schonenberg, Keith Kwong Hon Wong | 2016-09-13 |
| 9431399 | Method for forming merged contact for semiconductor device | Balasubramanian Pranatharthiharan, Sivananda K. Kanakasabapathy, Ravikumar Ramachandran, Mickey H. Yu | 2016-08-30 |
| 9397175 | Multi-composition gate dielectric field effect transistors | Unoh Kwon, Wing L. Lai, Zhengwen Li, Vijay Narayanan, Ravikumar Ramachandran +1 more | 2016-07-19 |
| 9397181 | Diffusion-controlled oxygen depletion of semiconductor contact interface | Ahmet S. Ozcan, Viraj Y. Sardesai, Kathryn T. Schonenberg, Cung D. Tran | 2016-07-19 |
| 9391175 | Fin end spacer for preventing merger of raised active regions | Sameer H. Jain, Viraj Y. Sardesai, Cung D. Tran, Reinaldo Vega | 2016-07-12 |
| 9390928 | Anisotropic dielectric material gate spacer for a field effect transistor | Hari V. Mallela, Reinaldo Vega | 2016-07-12 |
| 9379012 | Oxide mediated epitaxial nickel disilicide alloy contact formation | Nicolas L. Breil, Christian Lavoie, Ahmet S. Ozcan, Kathryn T. Schonenberg | 2016-06-28 |
| 9368493 | Method and structure to suppress FinFET heating | Viraj Y. Sardesai, Cung D. Tran, Reinaldo Vega | 2016-06-14 |
| 9349836 | Fin end spacer for preventing merger of raised active regions | Sameer H. Jain, Viraj Y. Sardesai, Cung D. Tran, Reinaldo Vega | 2016-05-24 |
| 9337041 | Anisotropic dielectric material gate spacer for a field effect transistor | Hari V. Mallela, Reinaldo Vega | 2016-05-10 |
| 9331166 | Selective dielectric spacer deposition for exposing sidewalls of a finFET | Sameer H. Jain, Viraj Y. Sardesai, Cung D. Tran, Reinaldo Vega | 2016-05-03 |
| 9318323 | Semiconductor devices with graphene nanoribbons | Viraj Y. Sardesai, Reinaldo Vega | 2016-04-19 |
| 9312185 | Formation of metal resistor and e-fuse | Cung D. Tran, Viraj Y. Sardesai, Reinaldo Vega | 2016-04-12 |
| 9305835 | Formation of air-gap spacer in transistor | Viraj Y. Sardesai, Cung D. Tran, Reinaldo Vega | 2016-04-05 |
| 9263454 | Semiconductor structure having buried conductive elements | Pooja R. Batra, Kangguo Cheng, Ramachandra Divakaruni, Johnathan E. Faltermeier, Reinaldo Vega | 2016-02-16 |
| 9245892 | Semiconductor structure having buried conductive elements | Pooja R. Batra, Kangguo Cheng, Ramachandra Divakaruni, Johnathan E. Faltermeier, Reinaldo Vega | 2016-01-26 |