Issued Patents 2016
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9484438 | Method to improve reliability of replacement gate device | Takashi Ando, Eduard A. Cartier, Kisik Choi | 2016-11-01 |
| 9472643 | Method to improve reliability of replacement gate device | Takashi Ando, Eduard A. Cartier, Kisik Choi | 2016-10-18 |
| 9472553 | High-K gate dielectric and metal gate conductor stack for planar field effect transistors formed on type III-V semiconductor material and silicon germanium semiconductor material | Takashi Ando, Martin M. Frank, Pranita Kerber | 2016-10-18 |
| 9466692 | Method to improve reliability of replacement gate device | Takashi Ando, Eduard A. Cartier, Kisik Choi | 2016-10-11 |
| 9455203 | Low threshold voltage CMOS device | Takashi Ando, Changhwan Choi, Kisik Choi | 2016-09-27 |
| 9449887 | Method of forming replacement gate PFET having TiALCO layer for improved NBTI performance | Takashi Ando, Balaji Kannan | 2016-09-20 |
| 9443953 | Sacrificial silicon germanium channel for inversion oxide thickness scaling with mitigated work function roll-off and improved negative bias temperature instability | Takashi Ando, Eduard A. Cartier, Kevin K. Chan | 2016-09-13 |
| 9397175 | Multi-composition gate dielectric field effect transistors | Emre Alptekin, Unoh Kwon, Wing L. Lai, Zhengwen Li, Ravikumar Ramachandran +1 more | 2016-07-19 |
| 9397199 | Methods of forming multi-Vt III-V TFET devices | Unoh Kwon, Siddarth A. Krishnan, Jeffrey W. Sleight | 2016-07-19 |
| 9391164 | Method to improve reliability of replacement gate device | Takashi Ando, Eduard A. Cartier, Kisik Choi | 2016-07-12 |
| 9368593 | Multiple thickness gate dielectrics for replacement gate field effect transistors | Unoh Kwon, Wing L. Lai, Sean M. Polvino, Ravikumar Ramachandran, Shahab Siddiqui | 2016-06-14 |
| 9362282 | High-K gate dielectric and metal gate conductor stack for planar field effect transistors formed on type III-V semiconductor material and silicon germanium semiconductor material | Takashi Ando, Martin M. Frank, Pranita Kerber | 2016-06-07 |
| 9349832 | Sacrificial silicon germanium channel for inversion oxide thickness scaling with mitigated work function roll-off and improved negative bias temperature instability | Takashi Ando, Eduard A. Cartier, Kevin K. Chan | 2016-05-24 |
| 9299802 | Method to improve reliability of high-K metal gate stacks | Takashi Ando, Eduard A. Cartier, Barry P. Linder | 2016-03-29 |
| 9299799 | Semiconductor devices containing an epitaxial perovskite/doped strontium titanate structure | Catherine A. Dubourdieu, Martin M. Frank | 2016-03-29 |
| 9263276 | High-k/metal gate transistor with L-shaped gate encapsulation layer | Renee T. Mo, Wesley C. Natzle, Jeffrey W. Sleight | 2016-02-16 |
| 9263344 | Low threshold voltage CMOS device | Takashi Ando, Changhwan Choi, Kisik Choi | 2016-02-16 |
| 9257289 | Lowering parasitic capacitance of replacement metal gate processes | Effendi Leobandung | 2016-02-09 |
| 9252229 | Inversion thickness reduction in high-k gate stacks formed by replacement gate processes | Takashi Ando | 2016-02-02 |
| 9252018 | High-k/metal gate transistor with L-shaped gate encapsulation layer | Renee T. Mo, Wesley C. Natzle, Jeffrey W. Sleight | 2016-02-02 |
| 9236314 | High-K/metal gate stack using capping layer methods, IC and related transistors | Michael P. Chudzik, Naim Moumen, Dae-Gyu Park, Vamsi K. Paruchuri | 2016-01-12 |
| 9231072 | Multi-composition gate dielectric field effect transistors | Emre Alptekin, Unoh Kwon, Wing L. Lai, Zhengwen Li, Ravikumar Ramachandran +1 more | 2016-01-05 |