Issued Patents 2016
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9530684 | Method and structure to suppress finFET heating | Emre Alptekin, Cung D. Tran, Reinaldo Vega | 2016-12-27 |
| 9515168 | Fin end spacer for preventing merger of raised active regions | Emre Alptekin, Sameer H. Jain, Cung D. Tran, Reinaldo Vega | 2016-12-06 |
| 9496368 | Partial spacer for increasing self aligned contact process margins | Emre Alptekin, Ravikumar Ramachandran, Reinaldo Vega | 2016-11-15 |
| 9496362 | Contact first replacement metal gate | Emre Alptekin, Ravikumar Ramachandran | 2016-11-15 |
| 9472415 | Directional chemical oxide etch technique | Emre Alptekin, Sivananda K. Kanakasabapathy, Ahmet S. Ozcan, Cung D. Tran | 2016-10-18 |
| 9397181 | Diffusion-controlled oxygen depletion of semiconductor contact interface | Emre Alptekin, Ahmet S. Ozcan, Kathryn T. Schonenberg, Cung D. Tran | 2016-07-19 |
| 9391175 | Fin end spacer for preventing merger of raised active regions | Emre Alptekin, Sameer H. Jain, Cung D. Tran, Reinaldo Vega | 2016-07-12 |
| 9368493 | Method and structure to suppress FinFET heating | Emre Alptekin, Cung D. Tran, Reinaldo Vega | 2016-06-14 |
| 9349836 | Fin end spacer for preventing merger of raised active regions | Emre Alptekin, Sameer H. Jain, Cung D. Tran, Reinaldo Vega | 2016-05-24 |
| 9331166 | Selective dielectric spacer deposition for exposing sidewalls of a finFET | Emre Alptekin, Sameer H. Jain, Cung D. Tran, Reinaldo Vega | 2016-05-03 |
| 9324709 | Self-aligned gate contact structure | Veeraraghavan S. Basker, Kangguo Cheng, Ali Khakifirooz, Raghavasimhan Sreenivasan | 2016-04-26 |
| 9318323 | Semiconductor devices with graphene nanoribbons | Emre Alptekin, Reinaldo Vega | 2016-04-19 |
| 9312185 | Formation of metal resistor and e-fuse | Cung D. Tran, Emre Alptekin, Reinaldo Vega | 2016-04-12 |
| 9305835 | Formation of air-gap spacer in transistor | Emre Alptekin, Cung D. Tran, Reinaldo Vega | 2016-04-05 |
| 9263457 | Cross-coupling of gate conductor line and active region in semiconductor devices | Robert C. Wong | 2016-02-16 |