RV

Reinaldo Vega

IBM: 17 patents #163 of 10,295Top 2%
Globalfoundries: 8 patents #80 of 2,145Top 4%
Overall (2016): #818 of 481,213Top 1%
25
Patents 2016

Issued Patents 2016

Patent #TitleCo-InventorsDate
9530700 Method of fabricating vertical field effect transistors with protective fin liner during bottom spacer recess etch Hari V. Mallela, Rajasekhar Venigalla 2016-12-27
9530684 Method and structure to suppress finFET heating Emre Alptekin, Viraj Y. Sardesai, Cung D. Tran 2016-12-27
9515168 Fin end spacer for preventing merger of raised active regions Emre Alptekin, Sameer H. Jain, Viraj Y. Sardesai, Cung D. Tran 2016-12-06
9514992 Unidirectional spacer in trench silicide Emre Alptekin, Sameer H. Jain, Unoh Kwon, Zhengwen Li, Hari V. Mallela +3 more 2016-12-06
9496258 Semiconductor fin isolation by a well trapping fin portion Henry K. Utomo, Kangguo Cheng, Ramachandra Divakaruni, Ravikumar Ramachandran, Huiling Shang 2016-11-15
9496368 Partial spacer for increasing self aligned contact process margins Emre Alptekin, Ravikumar Ramachandran, Viraj Y. Sardesai 2016-11-15
9466693 Self aligned replacement metal source/drain finFET Emre Alptekin, Robert R. Robison 2016-10-11
9437503 Vertical FETs with variable bottom spacer recess Hari V. Mallela, Rajasekhar Venigalla 2016-09-06
9431395 Protection of semiconductor-oxide-containing gate dielectric during replacement gate formation Gregory Costrini, Ravikumar Ramachandran, Richard S. Wise 2016-08-30
9397175 Multi-composition gate dielectric field effect transistors Emre Alptekin, Unoh Kwon, Wing L. Lai, Zhengwen Li, Vijay Narayanan +1 more 2016-07-19
9391175 Fin end spacer for preventing merger of raised active regions Emre Alptekin, Sameer H. Jain, Viraj Y. Sardesai, Cung D. Tran 2016-07-12
9390928 Anisotropic dielectric material gate spacer for a field effect transistor Emre Alptekin, Hari V. Mallela 2016-07-12
9368493 Method and structure to suppress FinFET heating Emre Alptekin, Viraj Y. Sardesai, Cung D. Tran 2016-06-14
9349836 Fin end spacer for preventing merger of raised active regions Emre Alptekin, Sameer H. Jain, Viraj Y. Sardesai, Cung D. Tran 2016-05-24
9349789 Coaxial carbon nanotube capacitor for eDRAM 2016-05-24
9337334 Semiconductor memory device employing a ferromagnetic gate Hari V. Mallela, Edward J. Nowak, Yunsheng Song, Keith Kwong Hon Wong, Zhijian Yang 2016-05-10
9337200 Dynamic random access memory cell employing trenches located between lengthwise edges of semiconductor fins Herbert L. Ho, Ravikumar Ramachandran 2016-05-10
9337041 Anisotropic dielectric material gate spacer for a field effect transistor Emre Alptekin, Hari V. Mallela 2016-05-10
9331166 Selective dielectric spacer deposition for exposing sidewalls of a finFET Emre Alptekin, Sameer H. Jain, Viraj Y. Sardesai, Cung D. Tran 2016-05-03
9318323 Semiconductor devices with graphene nanoribbons Emre Alptekin, Viraj Y. Sardesai 2016-04-19
9312185 Formation of metal resistor and e-fuse Cung D. Tran, Emre Alptekin, Viraj Y. Sardesai 2016-04-12
9305835 Formation of air-gap spacer in transistor Emre Alptekin, Viraj Y. Sardesai, Cung D. Tran 2016-04-05
9263454 Semiconductor structure having buried conductive elements Emre Alptekin, Pooja R. Batra, Kangguo Cheng, Ramachandra Divakaruni, Johnathan E. Faltermeier 2016-02-16
9245892 Semiconductor structure having buried conductive elements Emre Alptekin, Pooja R. Batra, Kangguo Cheng, Ramachandra Divakaruni, Johnathan E. Faltermeier 2016-01-26
9231072 Multi-composition gate dielectric field effect transistors Emre Alptekin, Unoh Kwon, Wing L. Lai, Zhengwen Li, Vijay Narayanan +1 more 2016-01-05