Issued Patents 2016
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9466538 | Method to achieve ultra-high chip-to-chip alignment accuracy for wafer-to-wafer bonding process | Spyridon Skordas, Donald F. Canaperi, Shidong Li, Wei Lin | 2016-10-11 |
| 9436845 | Physically unclonable fuse using a NOR type memory array | Toshiaki Kirihata, Chandrasekharan Kothandaraman, Derek H. Leu, Sami Rosenblatt | 2016-09-06 |
| 9431339 | Wiring structure for trench fuse component with methods of fabrication | Toshiaki Kirihata, Edward P. Maciejewski, Chengwen Pei, Deepal Wehella-Gamage | 2016-08-30 |
| 9431340 | Wiring structure for trench fuse component with methods of fabrication | Toshiaki Kirihata, Edward P. Maciejewski, Chengwen Pei, Deepal Wehella-Gamage | 2016-08-30 |
| 9406561 | Three dimensional integrated circuit integration using dielectric bonding first and through via formation last | Mukta G. Farooq, Robert Hannon, Emily R. Kinser | 2016-08-02 |
| 9368489 | Interconnect circuits at three-dimensional (3-D) bonding interfaces of a processor array | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Andrew S. Cassidy, Bryan L. Jackson +3 more | 2016-06-14 |
| 9363137 | Faulty core recovery mechanisms for a three-dimensional network on a processor array | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Andrew S. Cassidy, Paul A. Merolla +1 more | 2016-06-07 |
| 9236389 | Embedded flash memory fabricated in standard CMOS process with self-aligned contact | Kangguo Cheng, Ramachandra Divakaruni, Ali Khakifirooz | 2016-01-12 |