FW

Fei Wang

AM AMD: 38 patents #6 of 1,128Top 1%
IN International: 1 patents #5 of 12Top 45%
JH J.M. Huber: 1 patents #6 of 21Top 30%
📍 Mason, OH: #1 of 93 inventorsTop 2%
🗺 Ohio: #1 of 5,754 inventorsTop 1%
Overall (2002): #38 of 266,432Top 1%
39
Patents 2002

Issued Patents 2002

Showing 26–39 of 39 patents

Patent #TitleCo-InventorsDate
6391766 Method of making a slot via filled dual damascene structure with middle stop layer Lynne A. Okada, Ramkumar Subramanian, Calvin T. Gabriel 2002-05-21
6383919 Method of making a dual damascene structure without middle stop layer Lynne A. Okada, Ramkumar Subramanian, Calvin T. Gabriel 2002-05-07
6380091 Dual damascene arrangement for metal interconnection with oxide dielectric layer and low K dielectric constant layer Jerry Cheng, Darrell M. Erb 2002-04-30
6376389 Method for eliminating anti-reflective coating in semiconductors Ramkumar Subramanian, Minh Van Ngo, Kashmir Sahota, YongZhong Hu, Hiroyuki Kinoshita +1 more 2002-04-23
6376308 Process for fabricating an EEPROM device having a pocket substrate region David K. Foote, Bharath Rangarajan, George J. Kluth 2002-04-23
6372635 Method for making a slot via filled dual damascene low k interconnect structure without middle stop layer Lynne A. Okada, Ramkumar Subramanian, Calvin T. Gabriel 2002-04-16
6372631 Method of making a via filled dual damascene structure without middle stop layer Lynne A. Okada, Ramkumar Subramanian, Calvin T. Gabriel 2002-04-16
6365505 Method of making a slot via filled dual damascene structure with middle stop layer Lynne A. Okada, Ramkumar Subramanian, Calvin T. Gabriel 2002-04-02
6362052 Use of an etch to reduce the thickness and around the edges of a resist mask during the creation of a memory cell Bharath Rangarajan, George J. Kluth, Ursula Q. Quinto 2002-03-26
6358362 Methods and arrangements for determining an endpoint for an in-situ local interconnect etching process William G. En, Allison Holbrook 2002-03-19
6359307 Method for forming self-aligned contacts and interconnection lines using dual damascene techniques Hiroyuki Kinoshita, Kashmir Sahota, Yu Sun, Wenge Yang 2002-03-19
6355575 Semiconductor device and method of manufacturing without damaging HSQ layer and metal pattern Simon S. Chan, Susan H. Chen 2002-03-12
6348406 Method for using a low dielectric constant layer as a semiconductor anti-reflective coating Ramkumar Subramanian, Minh Van Ngo, Kashmir Sahota, YongZhong Hu, Hiroyuki Kinoshita +1 more 2002-02-19
6348379 Method of forming self-aligned contacts using consumable spacers Ramkumar Subramanian, Yu Sun 2002-02-19