BR

Bharath Rangarajan

AM AMD: 41 patents #5 of 1,128Top 1%
📍 Sunnyvale, CA: #1 of 1,006 inventorsTop 1%
🗺 California: #6 of 26,763 inventorsTop 1%
Overall (2002): #34 of 266,432Top 1%
41
Patents 2002

Issued Patents 2002

Showing 1–25 of 41 patents

Patent #TitleCo-InventorsDate
6501534 Automated periodic focus and exposure calibration of a lithography stepper Bhanwar Singh, Ramkumar Subramanian, Carmen Morales 2002-12-31
6492075 Chemical trim process Michael K. Templeton, Ramkumar Subramanian 2002-12-10
6486078 Super critical drying of low k materials Ramkumar Subramanian, Bhanwar Singh 2002-11-26
6486072 System and method to facilitate removal of defects from a substrate Khoi A. Phan, Bhanwar Singh 2002-11-26
6486029 Integration of an ion implant hard mask structure into a process for fabricating high density memory cells David K. Foote, Stephan K. Park, Fei Wang, Dawn Hopper, Jack F. Thomas +2 more 2002-11-26
6482558 Conducting electron beam resist thin film layer for patterning of mask plates Bhanwar Singh, Ramkumar Subramanian 2002-11-19
6479820 Electrostatic charge reduction of photoresist pattern on development track Bhanwar Singh, Ramkumar Subramanian, Khoi A. Phan, Bryan K. Choo 2002-11-12
6465156 Method for mitigating formation of silicon grass Bhanwar Singh, Steven C. Avanzino 2002-10-15
6459482 Grainless material for calibration sample Bhanwar Singh, Ramkumar Subramanian, Khoi A. Phan, Michael K. Templeton, Sanjay K. Yedur +1 more 2002-10-01
6459945 System and method for facilitating determining suitable material layer thickness in a semiconductor device fabrication process Bhanwar Singh, Carmen Morales 2002-10-01
6458677 Process for fabricating an ONO structure Dawn Hopper, David K. Foote 2002-10-01
6458656 Process for creating a flash memory cell using a photoresist flow operation Stephen Keetai Park, George J. Kluth 2002-10-01
6458607 Using UV/VIS spectrophotometry to regulate developer solution during a development process Bhanwar Singh, Ramkumar Subramanian 2002-10-01
6455416 Developer soluble dyed BARC for dual damascene process Ramkumar Subramanian, Bhanwar Singh, Michael K. Templeton 2002-09-24
6451621 Using scatterometry to measure resist thickness and control implant Bhanwar Singh, Ramkumar Subramanian 2002-09-17
6451512 UV-enhanced silylation process to increase etch resistance of ultra thin resists Ramkumar Subramanian, Khoi A. Phan, Bhanwar Singh, Michael K. Templeton, Sanjay K. Yedur +1 more 2002-09-17
6448097 Measure fluorescence from chemical released during trim etch Bhanwar Singh, Ramkumar Subramanian 2002-09-10
6444373 Modification of mask layout data to improve mask fidelity Ramkumar Subramanian, Khoi A. Phan, Bhanwar Singh 2002-09-03
6445072 Deliberate void in innerlayer dielectric gapfill to reduce dielectric constant Ramkumar Subramanian, Bhanwar Singh, Michael K. Templeton 2002-09-03
6444381 Electron beam flood exposure technique to reduce the carbon contamination Bhanwar Singh, Ramkumar Subramanian, Michael K. Templeton, Khoi A. Phan, Bryan K. Choo +1 more 2002-09-03
6441418 Spacer narrowed, dual width contact for charge gain reduction Jeffrey A. Shields 2002-08-27
6439963 System and method for mitigating wafer surface disformation during chemical mechanical polishing (CMP) Bhanwar Singh, Ursula Q. Quinto 2002-08-27
6440289 Method for improving seed layer electroplating for semiconductor Christy Mei-Chu Woo, Bhanwar Singh 2002-08-27
6441349 System for facilitating uniform heating temperature of photoresist Bhanwar Singh, Sanjay K. Yedur 2002-08-27
6436766 Process for fabricating high density memory cells using a polysilicon hard mask David K. Foote, Fei Wang, Dawn Hopper, Stephen Keetai Park, Jack F. Thomas +2 more 2002-08-20