Issued Patents 2002
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6461923 | Sidewall spacer etch process for improved silicide formation | Angela T. Hui, Paul R. Besser | 2002-10-08 |
| 6391750 | Method of selectively controlling contact resistance by controlling impurity concentration and silicide thickness | Paul R. Besser | 2002-05-21 |
| 6383947 | Anti-reflective coating used in the fabrication of microcircuit structures in 0.18 micron and smaller technologies | Paul R. Besser, Bhanwar Singh, Darrell M. Erb, Carmen Morales | 2002-05-07 |
| 6368949 | Post-spacer etch surface treatment for improved silicide formation | Simon S. Chan | 2002-04-09 |
| 6355575 | Semiconductor device and method of manufacturing without damaging HSQ layer and metal pattern | Fei Wang, Simon S. Chan | 2002-03-12 |
| 6346745 | Cu-A1 combined interconnect system | Takeshi Nogami | 2002-02-12 |