Issued Patents All Time
Showing 76–100 of 199 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10991626 | Method for controlling transistor delay of nanowire or nanosheet transistor devices | Jeffrey Smith, Subhadeep Kal | 2021-04-27 |
| 10964706 | Three-dimensional semiconductor device including integrated circuit, transistors and transistor components and method of fabrication | Jeffrey Smith | 2021-03-30 |
| 10946411 | System and method for fluid dispense and coverage control | — | 2021-03-16 |
| 10930764 | Extension region for a semiconductor device | Kandabara Tapily, Jeffrey Smith, Nihar Mohanty | 2021-02-23 |
| 10923363 | Method for increasing pattern density on a wafer | Sanjana Das, Daniel Fulford | 2021-02-16 |
| 10916637 | Method of forming gate spacer for nanowire FET device | Jeffrey Smith | 2021-02-09 |
| 10833078 | Semiconductor apparatus having stacked gates and method of manufacture thereof | Jeffrey Smith, Kandabara Tapily, Subhadeep Kal, Gerrit J. Leusink | 2020-11-10 |
| 10811265 | Location-specific tuning of stress to control bow to control overlay in semiconductor processing | — | 2020-10-20 |
| 10770479 | Three-dimensional device and method of forming the same | Jeffrey Smith, Kandabara Tapily, Jodi Grzeskowiak, Kai-Hung Yu | 2020-09-08 |
| 10734224 | Method and device for incorporating single diffusion break into nanochannel structures of FET devices | Jeffrey Smith | 2020-08-04 |
| 10734229 | Method of advanced contact hole pattering | Corey Lemley | 2020-08-04 |
| 10712663 | High-purity dispense unit | Ronald Nasman, David Travis, James Grootegoed, Norman A. Jacobson, Jr. | 2020-07-14 |
| 10714391 | Method for controlling transistor delay of nanowire or nanosheet transistor devices | Jeffrey Smith, Subhadeep Kal | 2020-07-14 |
| 10665672 | Method of preventing bulk silicon charge transfer for nanowire and nanoslab processing | Jeffrey Smith | 2020-05-26 |
| 10622233 | Amelioration of global wafer distortion based on determination of localized distortions of a semiconductor wafer | Joshua Hooge, Nathan Ip, Joel Estrella | 2020-04-14 |
| 10606176 | Method for patterning a substrate using extreme ultraviolet lithography | — | 2020-03-31 |
| 10586765 | Buried power rails | Jeffrey Smith, Kandabara Tapily | 2020-03-10 |
| 10573655 | Three-dimensional semiconductor device and method of fabrication | Jeffrey Smith | 2020-02-25 |
| 10551743 | Critical dimension control by use of photo-sensitized chemicals or photo-sensitized chemically amplified resist | Michael A. Carcasi | 2020-02-04 |
| 10525416 | Method of liquid filter wetting | Hoyoung Kang, Corey Lemley | 2020-01-07 |
| 10529830 | Extension region for a semiconductor device | Kandabara Tapily, Jeffrey Smith, Nihar Mohanty | 2020-01-07 |
| 10522428 | Critical dimension control by use of a photo agent | Michael A. Carcasi | 2019-12-31 |
| 10522461 | Semiconductor device structures | Adam L. Olson, Kaveri Jain, Lijing Gou, William R. Brown, Ho Seop Eom +1 more | 2019-12-31 |
| 10490630 | Method of preventing bulk silicon charge transfer for nanowire and nanoslab processing | Jeffrey Smith | 2019-11-26 |
| 10475657 | Location-specific tuning of stress to control bow to control overlay in semiconductor processing | — | 2019-11-12 |