Issued Patents All Time
Showing 226–250 of 337 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6271123 | Chemical-mechanical polish method using an undoped silicon glass stop layer for polishing BPSG | Chung-Long Chang | 2001-08-07 |
| 6268294 | Method of protecting a low-K dielectric material | Shwangming Jeng, Weng Chang | 2001-07-31 |
| 6265319 | Dual damascene method employing spin-on polymer (SOP) etch stop layer | — | 2001-07-24 |
| 6261957 | Self-planarized gap-filling by HDPCVD for shallow trench isolation | Chu-Yun Fu | 2001-07-17 |
| 6255232 | Method for forming low dielectric constant spin-on-polymer (SOP) dielectric layer | Weng Chang, Yao-Yi Cheng | 2001-07-03 |
| 6255207 | Composite planarizing dielectric layer employing high density plasma chemical vapor deposited (HDP-CVD) underlayer | — | 2001-07-03 |
| 6248665 | Delamination improvement between Cu and dielectrics for damascene process | Tien-I Bao | 2001-06-19 |
| 6245691 | Ozone-teos method for forming with attenuated surface sensitivity a silicon oxide dielectric layer upon a thermally oxidized silicon substrate layer | Chen-Hua Yu | 2001-06-12 |
| 6245682 | Removal of SiON ARC film after poly photo and etch | Chu-Yun Fu | 2001-06-12 |
| 6245669 | High selectivity Si-rich SiON etch-stop layer | Chu-Yun Fu, Chia-Shiung Tsai | 2001-06-12 |
| 6242356 | Etchback method for forming microelectronic layer with enhanced surface smoothness | Chung-Long Chang, Shwangming Jeng, Chen-Hua Yu | 2001-06-05 |
| 6239023 | Method to reduce the damages of copper lines | Ying-Ho Chen, Jih-Churng Twu, Chen-Hua Yu | 2001-05-29 |
| 6239002 | Thermal oxidizing method for forming with attenuated surface sensitivity ozone-teos silicon oxide dielectric layer upon a thermally oxidized silicon substrate layer | Ying-Ho Chen, Chen-Hua Yu | 2001-05-29 |
| 6235633 | Method for making tungsten metal plugs in a polymer low-K intermetal dielectric layer using an improved two-step chemical/mechanical polishing process | — | 2001-05-22 |
| 6228760 | Use of PE-SiON or PE-OXIDE for contact or via photo and for defect reduction with oxide and W chemical-mechanical polish | Chen-Hua Yu, Tsu Shih, Anthony Yen, Jih-Churng Twu | 2001-05-08 |
| 6228780 | Non-shrinkable passivation scheme for metal em improvement | So Wein Kuo, Chu-Yun Fu, Ruey-Lian Hwang | 2001-05-08 |
| 6225171 | Shallow trench isolation process for reduced for junction leakage | Chen-Hua Yu | 2001-05-01 |
| 6211098 | Wet oxidation method for forming silicon oxide dielectric layer | Jih-Churng Twu, Chen-Hua Yu | 2001-04-03 |
| 6207483 | Method for smoothing polysilicon gate structures in CMOS devices | Chu-Yun Fu, Chung-Long Chang, Shwangming Jeng | 2001-03-27 |
| 6204205 | Using H2anneal to improve the electrical characteristics of gate oxide | Mo Yu | 2001-03-20 |
| 6200875 | Chemical mechanical polishing of polysilicon plug using a silicon nitride stop layer | Chung-Long Chang | 2001-03-13 |
| 6197658 | Sub-atmospheric pressure thermal chemical vapor deposition (SACVD) trench isolation method with attenuated surface sensitivity | — | 2001-03-06 |
| 6197706 | Low temperature method to form low k dielectric | Lain-Jang Li, Cheng-Chung Lin | 2001-03-06 |
| 6197669 | Reduction of surface defects on amorphous silicon grown by a low-temperature, high pressure LPCVD process | Jih-Churng Twu, Chen-Hua Yu | 2001-03-06 |
| 6197660 | Integration of CMP and wet or dry etching for STI | Ying-Ho Chen | 2001-03-06 |