Issued Patents All Time
Showing 26–50 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9252060 | Reduction of OCD measurement noise by way of metal via slots | Chi-Ming Tsai, Liang-Guang Chen, Han-Hsin Kuo, Fu-Ming Huang, Hao-Jen Liao | 2016-02-02 |
| 9142453 | Interconnect structure and method of forming the same | Chien-Chih Chiu | 2015-09-22 |
| 9123656 | Organosilicate polymer mandrel for self-aligned double patterning process | Wen-Kuo Hsieh, Jyu-Horng Shieh | 2015-09-01 |
| 8895445 | Method of forming via holes | Wen-Kuo Hsieh, Marowen Ng, Hsin-Yi Tsai | 2014-11-25 |
| 8617986 | Integrated circuits and methods for forming the integrated circuits | Chii-Ping Chen | 2013-12-31 |
| 8354346 | Method for fabricating low-k dielectric and Cu interconnect | Chih-Hao Chen, Chia-Cheng Chou, Keng-Chu Lin, Tzu-Li Lee | 2013-01-15 |
| 8222151 | Double patterning strategy for contact hole and trench in photolithography | Chih-Hao Chen, Yu-Yu Chen, Hsin-Yi Tsai | 2012-07-17 |
| 8008206 | Double patterning strategy for contact hole and trench in photolithography | Chih-Hao Chen, Yu-Yu Chen, Hsin-Yi Tsai | 2011-08-30 |
| 7998873 | Method for fabricating low-k dielectric and Cu interconnect | Chih-Hao Chen, Chia-Cheng Chou, Keng-Chu Lin, Tzu-Li Lee | 2011-08-16 |
| 7670947 | Metal interconnect structure and process for forming same | Tsang-Jiuh Wu, Syun-Ming Jang, Hsin-Yi Tsai | 2010-03-02 |
| 7361604 | Method for reducing dimensions between patterns on a hardmask | Henry Chung, Shin-Yi Tsai | 2008-04-22 |
| 7303995 | Method for reducing dimensions between patterns on a photoresist | Henry Chung, Shin-Yi Tsai | 2007-12-04 |
| 7105099 | Method of reducing pattern pitch in integrated circuits | Henry Chung, An-Chi Wei, Shin-Yi Tsai, Kuo-Liang Wei | 2006-09-12 |
| 7033948 | Method for reducing dimensions between patterns on a photoresist | Henry Chung, Shin-Yi Tsai | 2006-04-25 |
| 7030459 | Three-dimensional memory structure and manufacturing method thereof | Erh-Kun Lai | 2006-04-18 |
| 6774051 | Method for reducing pitch | Chia-Chi Chung, Henry Chung, Jerry Lai | 2004-08-10 |
| 6750150 | Method for reducing dimensions between patterns on a photoresist | Henry Chung, Shin-Yi Tsai | 2004-06-15 |
| 6746970 | Method of forming a fluorocarbon polymer film on a substrate using a passivation layer | Chung-Tai Chen, Hsin-Yi Tsai | 2004-06-08 |
| 6635579 | Operating method of a semiconductor etcher | Shin-Yi Tsai, Hsu-Sheng Yu, Chun-Hung Lee | 2003-10-21 |
| 6601596 | Apparatus for cleaning a wafer with shearing stress from slab with curved portion | Shin-Yi Tsai | 2003-08-05 |
| 6573177 | Protection layer to prevent under-layer damage during deposition | Stefan Tsai, Chai-Chi Chung | 2003-06-03 |
| 6511902 | Fabrication method for forming rounded corner of contact window and via by two-step light etching technique | Shin-Yi Tsai | 2003-01-28 |
| 6491046 | Vertical batch type wafer cleaning apparatus | — | 2002-12-10 |
| 6492214 | Method of fabricating an insulating layer | Chien-Wei Chen, Shin-Yi Tsai, Jiun-Ren Lai | 2002-12-10 |
| 6350660 | Process for forming a shallow trench isolation | Shiuh-Sheng Yu, Chun-Hung Lee | 2002-02-26 |