Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7361604 | Method for reducing dimensions between patterns on a hardmask | Henry Chung, Ming-Chung Liang | 2008-04-22 |
| 7303995 | Method for reducing dimensions between patterns on a photoresist | Henry Chung, Ming-Chung Liang | 2007-12-04 |
| 7105099 | Method of reducing pattern pitch in integrated circuits | Henry Chung, Ming-Chung Liang, An-Chi Wei, Kuo-Liang Wei | 2006-09-12 |
| 7033948 | Method for reducing dimensions between patterns on a photoresist | Henry Chung, Ming-Chung Liang | 2006-04-25 |
| 6790772 | Dual damascene processing method using silicon rich oxide layer thereof and its structure | Chia-Chi Chung | 2004-09-14 |
| 6750150 | Method for reducing dimensions between patterns on a photoresist | Henry Chung, Ming-Chung Liang | 2004-06-15 |
| 6635579 | Operating method of a semiconductor etcher | Ming-Chung Liang, Hsu-Sheng Yu, Chun-Hung Lee | 2003-10-21 |
| 6601596 | Apparatus for cleaning a wafer with shearing stress from slab with curved portion | Ming-Chung Liang | 2003-08-05 |
| 6511902 | Fabrication method for forming rounded corner of contact window and via by two-step light etching technique | Ming-Chung Liang | 2003-01-28 |
| 6500767 | Method of etching semiconductor metallic layer | Jen-Jiann Chiou | 2002-12-31 |
| 6492214 | Method of fabricating an insulating layer | Chien-Wei Chen, Ming-Chung Liang, Jiun-Ren Lai | 2002-12-10 |