Issued Patents All Time
Showing 76–97 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10714342 | Semiconductor device and method of forming the same | Hsin-Che Chiang, Chun-Sheng Liang | 2020-07-14 |
| 10629492 | Gate structure having a dielectric gate and methods thereof | Ta-Chun Lin, Buo-Chin Hsu, Jhon Jhy Liaw, Chih-Yung Lin | 2020-04-21 |
| 10553481 | Vias for cobalt-based interconnects and methods of fabrication thereof | Yu-Jen Chang, Min-Yann Hsieh, Hua Feng Chen | 2020-02-04 |
| 10516030 | Contact plugs and methods forming same | Je-Wei Hsu, Hua Feng Chen, Jyun-Ming Lin, Chen-Huang Peng, Min-Yann Hsieh +1 more | 2019-12-24 |
| 10510751 | FinFET isolation structure and method for fabricating the same | Wen-Che Tsai, Min-Yann Hsieh, Hua Feng Chen | 2019-12-17 |
| 10403737 | Method of forming a gate structure of a semiconductor device | Hsin-Che Chiang, Ju-Yuan Tzeng, Chun-Sheng Liang, Shu-Hui Wang | 2019-09-03 |
| 10347750 | Semiconductor device and manufacturing method thereof | Ming-Heng Tsai, Chun-Sheng Liang | 2019-07-09 |
| 10332786 | Method for manufacturing a semiconductor device | Wen-Che Tsai, Min-Yann Hsieh, Hua Feng Chen | 2019-06-25 |
| 10304942 | Sidewall spacers for self-aligned contacts | Jyun-Ming Lin, Hua Feng Chen, Min-Yann Hsieh, C. H. Wu | 2019-05-28 |
| 10134873 | Semiconductor device gate structure and method of fabricating thereof | Hsin-Che Chiang, Ju-Yuan Tzeng, Chun-Sheng Liang, Shu-Hui Wang | 2018-11-20 |
| 10074558 | FinFET structure with controlled air gaps | Wen-Che Tsai, Min-Yann Hsieh, Hua Feng Chen | 2018-09-11 |
| 9947594 | Semiconductor device and manufacturing method thereof | Chih-Yang Yeh, Shun-Jang Liao, Shu-Hui Wang, Chun-Sheng Liang, Jeng-Ya David Yeh | 2018-04-17 |
| 9882023 | Sidewall spacers for self-aligned contacts | Jyun-Ming Lin, Hua Feng Chen, Min-Yann Hsieh, C. H. Wu | 2018-01-30 |
| 9287276 | Memory cell array | Shi-Wei Chang, Hong-Chen Cheng, Chien-Chi TIEN, Li-Chun Tien, Jhon Jhy Liaw | 2016-03-15 |
| 8665654 | Memory edge cell | Hong-Chen Cheng, Ming-Yi Lee, Jung-Hsuan Chen, Li-Chun Tien, Cheng Hung Lee +1 more | 2014-03-04 |
| 8482990 | Memory edge cell | Hong-Chen Cheng, Ming-Yi Lee, Jung-Hsuan Chen, Li-Chun Tien, Cheng Hung Lee +1 more | 2013-07-09 |
| 7816686 | Forming silicides with reduced tailing on silicon germanium and silicon | Ken Liao, Augus Tai, Harry-Hak-Lay Chuang | 2010-10-19 |
| 7754571 | Method for forming a strained channel in a semiconductor device | Ken Liao, Yun-Hsiu Chen, Syun-Ming Jang, Yi-Ching Lin | 2010-07-13 |
| 6444544 | Method of forming an aluminum protection guard structure for a copper metal structure | Chu-Wei Hu, Chung-Te Lin, Hsien-Chin Lin | 2002-09-03 |
| 6380021 | Ultra-shallow junction formation by novel process sequence for PMOSFET | Jyh-Haur Wang, Chih-Chiang Wang, Hsien-Chin Lin, Carlos H. Diaz | 2002-04-30 |
| 6207538 | Method for forming n and p wells in a semiconductor substrate using a single masking step | Chu-Wei Hu, Chung-Te Lin, Chin-Hsiung Ho | 2001-03-27 |
| 6074905 | Formation of a thin oxide protection layer at poly sidewall and area surface | Chu-Wei Hu, Chung-Te Lin, Chin-Shan Hou | 2000-06-13 |