Issued Patents All Time
Showing 51–75 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11315924 | Isolation structure for preventing unintentional merging of epitaxially grown source/drain | Ta-Chun Lin, Kuan-Lin Yeh, Chun-Jun Lin, Mu-Chi Chiang | 2022-04-26 |
| 11302692 | Semiconductor devices having gate dielectric layers of varying thicknesses and methods of forming the same | Ta-Chun Lin, Jhon Jhy Liaw, Shien-Yang Wu | 2022-04-12 |
| 11282942 | Semiconductor device structure with uniform threshold voltage distribution and method of forming the same | Wei-Chih Kao, Hsin-Che Chiang, Yu-San Chien, Chun-Sheng Liang | 2022-03-22 |
| 11282705 | Semiconductor device and method of forming the same | Hsin-Che Chiang, Chun-Sheng Liang | 2022-03-22 |
| 11251181 | FinFET isolation structure and method for fabricating the same | Wen-Che Tsai, Min-Yann Hsieh, Hua Feng Chen | 2022-02-15 |
| 11251069 | Method for forming isolation with multi-step structure | Ta-Chun Lin, Tien-Shao CHUANG, Kuang-Cheng Tai, Chun-Hung Chen, Chih-Hung Hsieh +1 more | 2022-02-15 |
| 11245034 | Semiconductor device and manufacturing method thereof | Kuei-Ming Chang, Ta-Chun Lin, Rei-Jay Hsieh, Yung-Chih Wang, Wen-Huei Guo +1 more | 2022-02-08 |
| 11245005 | Method for manufacturing semiconductor structure with extended contact structure | Ta-Chun Lin, Jhon Jhy Liaw, Chao-Ching Cheng, Hung-Li Chiang, Shih-Syuan Huang +3 more | 2022-02-08 |
| 11239339 | Gate structure and method | Ta-Chun Lin, Jhon Jhy Liaw | 2022-02-01 |
| 11152488 | Gate-all-around structure with dummy pattern top in channel region and methods of forming the same | Ta-Chun Lin, Jhon Jhy Liaw | 2021-10-19 |
| 11133224 | Semiconductor structure and method for forming the same | Hsin-Che Chiang, Yu-San Chien, Ta-Chun Lin, Chun-Sheng Liang | 2021-09-28 |
| 11101359 | Gate-all-around (GAA) method and devices | Shien-Yang Wu, Ta-Chun Lin | 2021-08-24 |
| 11101385 | Fin field effect transistor (FinFET) device structure with air gap and method for forming the same | Wen-Li Chiu, Hsin-Che Chiang, Chun-Sheng Liang | 2021-08-24 |
| 11037831 | Gate structure and method | Ta-Chun Lin, Buo-Chin Hsu, Jhon Jhy Liaw, Chih-Yung Lin | 2021-06-15 |
| 11038059 | Semiconductor device and method of forming the same | Chun-Sheng Liang, Hsin-Che Chiang, Ming-Heng Tsai | 2021-06-15 |
| 11018257 | Semiconductor device structure having a plurality of threshold voltages and method of forming the same | Yu-San Chien, Hsin-Che Chiang, Chun-Sheng Liang | 2021-05-25 |
| 10998237 | Gate structure and method with dielectric gates and gate-cut features | Ta-Chun Lin, Buo-Chin Hsu, Jhon Jhy Liaw, Chih-Yung Lin | 2021-05-04 |
| 10971606 | Method for manufacturing semiconductor device | Ming-Heng Tsai, Chun-Sheng Liang | 2021-04-06 |
| 10930752 | Contact plugs and methods forming same | Je-Wei Hsu, Hua Feng Chen, Jyun-Ming Lin, Chen-Huang Peng, Min-Yann Hsieh +1 more | 2021-02-23 |
| 10879110 | FinFET structure with controlled air gaps | Wen-Che Tsai, Min-Yann Hsieh, Hua Feng Chen | 2020-12-29 |
| 10872980 | Semiconductor device and manufacturing method thereof | Wen-Che Tsai, Min-Yann Hsieh, Hua Feng Chen | 2020-12-22 |
| 10867806 | Semiconductor device gate structure and method of fabricating thereof | Hsin-Che Chiang, Ju-Yuan Tzeng, Chun-Sheng Liang, Shu-Hui Wang | 2020-12-15 |
| 10854506 | Semiconductor device and manufacturing method thereof | Chun-Sheng Liang, Wei-Chih Kao, Hsin-Che Chiang | 2020-12-01 |
| 10790184 | Isolation with multi-step structure for FinFET device and method of forming the same | Ta-Chun Lin, Tien-Shao CHUANG, Kuang-Cheng Tai, Chun-Hung Chen, Chih-Hung Hsieh +1 more | 2020-09-29 |
| 10741558 | Nanosheet CMOS device and method of forming | Hsin-Che Chiang, Chun-Sheng Liang | 2020-08-11 |