Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6407433 | Preventing gate oxide damage by post poly definition implantation while gate mask is on | Chih-Heng Shen | 2002-06-18 |
| 6380021 | Ultra-shallow junction formation by novel process sequence for PMOSFET | Chih-Chiang Wang, Hsien-Chin Lin, Kuo-Hua Pan, Carlos H. Diaz | 2002-04-30 |
| 6284579 | Drain leakage reduction by indium transient enchanced diffusion (TED) for low power applications | Bi-Ling Lin, Chung-Cheng Wu, Carlos H. Diaz | 2001-09-04 |
| 6214682 | Method for fabricating an ultra-shallow junction with low resistance using a rapid thermal anneal in ammonia to increase activation ratio and reduce diffusion of lightly doped source and drain regions | — | 2001-04-10 |
| 6191052 | Method for fabricating an ultra-shallow junction with low resistance using a screen oxide formed by poly re-oxidation in a nitrogen containing atmosphere | — | 2001-02-20 |
| 6187639 | Method to prevent gate oxide damage by post poly definition implantation | Chih-Heng Shen | 2001-02-13 |
| 6121091 | Reduction of a hot carrier effect phenomena via use of transient enhanced diffusion processes | — | 2000-09-19 |
| 6117737 | Reduction of a hot carrier effect by an additional furnace anneal increasing transient enhanced diffusion for devices comprised with low temperature spacers | Boon-Khim Liew | 2000-09-12 |
| 5866947 | Post tungsten etch bank anneal, to improve aluminum step coverage | Shun-Liang Hsu | 1999-02-02 |
| 5641710 | Post tungsten etch back anneal, to improve aluminum step coverage | Shun-Liang Hsu | 1997-06-24 |