Issued Patents All Time
Showing 26–44 of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10522526 | LTHC as charging barrier in InFO package formation | Yi-Jen Lai, Lin Chung-Yi, Hsi-Kuei Cheng, Chen-Shien Chen | 2019-12-31 |
| 10170429 | Method for forming package structure including intermetallic compound | Heng-Chi Huang, Chien-Chen Li, Kuo-Lung Li, Cheng-Liang Cho, Che-Jung Chu | 2019-01-01 |
| 10163849 | Method of manufacturing semiconductor structure | Alexander Kalnitsky, Yi-Yang Lei, Hsi-Ching Wang, Cheng-Yu Kuo, Tsung Lung Huang +9 more | 2018-12-25 |
| 10115686 | Semiconductor structure and fabricating method thereof | Wei-Li Huang, Jheng-Jie Wong, Hsiang-Sheng Su, Tsung Lung Huang, Hsin-Chieh Huang +3 more | 2018-10-30 |
| 10014218 | Method for forming semiconductor device structure with bumps | Meng-Fu Shih, Cheng-Lin Huang, Chien-Chen Li, Che-Jung Chu, Wen-Ming Chen | 2018-07-03 |
| 9799625 | Semiconductor structure and manufacturing method thereof | Alexander Kalnitsky, Yi-Yang Lei, Hsi-Ching Wang, Cheng-Yu Kuo, Tsung Lung Huang +9 more | 2017-10-24 |
| 9209048 | Two step molding grinding for packaging applications | Wen-Chun Huang, Chien-Chen Li, Ruey-Yun Shiue, Hsi-Kuei Cheng, Chih-Hsien Lin +3 more | 2015-12-08 |
| 7091535 | High voltage device embedded non-volatile memory cell and fabrication method | Hung-Chih Tsai, Chien-Chih Chou, Ying-Ting Chang, Che-Jung Chu | 2006-08-15 |
| 6747336 | Twin current bipolar device with hi-lo base profile | Jun-Lin Tsai, Ruey-Hsing Liu, Chiou-Shian Peng | 2004-06-08 |
| 6590262 | High voltage ESD protection device with very low snapback voltage | Jyh-Min Jiang, Jian-Hsing Lee, Ruey-Hsin Liu | 2003-07-08 |
| 6569730 | High voltage transistor using P+ buried layer | Jun-Lin Tsai, Ruey-Hsin Liu, Jei-Feng Hwang | 2003-05-27 |
| 6459127 | Uniform current distribution SCR device for high voltage ESD protection | Jian-Hsing Lee, Bing-Lung Liao, Jiaw-Ren Shih | 2002-10-01 |
| 6423590 | High voltage transistor using P+ buried layer | Jun-Lin Tsai, Ruey-Hsin Lin, Jei-Feng Hwang | 2002-07-23 |
| 6358781 | Uniform current distribution SCR device for high voltage ESD protection | Jian-Hsing Lee, Bing-Lung Liao, Jiaw-Ren Shih | 2002-03-19 |
| 6323074 | High voltage ESD protection device with very low snapback voltage by adding as a p+ diffusion and n-well to the NMOS drain | Jyh-Min Jiang, Jian-Hsing Lee, Ruey-Hsin Liu | 2001-11-27 |
| 6245609 | High voltage transistor using P+ buried layer | Jun-Lin Tsai, Ruey-Hsin Liu, Jei-Feng Hwang | 2001-06-12 |
| 6211028 | Twin current bipolar device with hi-lo base profile | Jun-Lin Tsai, Ruey-Hsing Liu, Chiou-Shian Peng | 2001-04-03 |
| 6162695 | Field ring to improve the breakdown voltage for a high voltage bipolar device | Jei-Feng Hwang, Jun-Lin Tsai, Ruey-Hsin Liou | 2000-12-19 |
| 6066879 | Combined NMOS and SCR ESD protection device | Jian-Hsing Lee | 2000-05-23 |