Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424558 | Bridge die having different surface orientation than IC dies interconnected by the bridge die | Yu-Sheng Lin, Chin-Fu Kao, Tsung-Yang Hsieh, Yao-Chun Chuang | 2025-09-23 |
| 12382587 | Methods and systems for improving surface mount joinder | Hsien-Wen Liu, Shih-Ting Hung, Yao-Chun Chuang, Yinlung Lu | 2025-08-05 |
| 12362246 | Interposer including stepped surfaces and methods of forming the same | Yu-Sheng Lin, Hsin-Hsien Lee, Yao-Chun Chuang | 2025-07-15 |
| 12362307 | Semiconductor package with ball grid array connection having improved reliability | Yu-Sheng Lin, Chen-Nan Chiu, Yao-Chun Chuang | 2025-07-15 |
| 12068300 | Chip-on-wafer-on-substrate package with improved yield | Chia-Wei Chang, Ju-Min Chen, Yao-Chun Chuang | 2024-08-20 |
| 10847492 | Semiconductor structure and manufacturing method for the same | Liang-Chen Lin, Shiang-Ruei Su | 2020-11-24 |
| 10014252 | Integrated circuit with multi-level arrangement of e-fuse protected decoupling capacitors | Shih-Cheng Chang, Liang-Chen Lin, Fu-Tsai Hou, Tung-Chin Yeh, Shih-Kai Lin +2 more | 2018-07-03 |
| 9711474 | Semiconductor package structure with polymeric layer and manufacturing method thereof | Gia-Her Lu, Liang-Chen Lin, Tung-Chin Yeh, Tung-Jiun Wu | 2017-07-18 |
| 9385079 | Methods for forming stacked capacitors with fuse protection | Shih-Cheng Chang, Liang-Chen Lin, Fu-Tsai Hou, Tung-Chin Yeh, Shih-Kai Lin +2 more | 2016-07-05 |