WF

Warren M. Farnworth

Micron: 760 patents #3 of 6,345Top 1%
AI Aptina Imaging: 7 patents #36 of 332Top 15%
RR Round Rock Research: 3 patents #66 of 239Top 30%
📍 Nampa, ID: #1 of 306 inventorsTop 1%
🗺 Idaho: #2 of 8,810 inventorsTop 1%
Overall (All Time): #113 of 4,157,543Top 1%
778
Patents All Time

Issued Patents All Time

Showing 751–775 of 778 patents

Patent #TitleCo-InventorsDate
5483174 Temporary connection of semiconductor die using optical alignment techniques David R. Hembree 1996-01-09
5440240 Z-axis interconnect for discrete die burn-in for nonpackaged die Alan G. Wood, David R. Hembree 1995-08-08
5440241 Method for testing, burning-in, and manufacturing wafer scale integrated circuits and a packaged wafer assembly produced thereby Jerrold L. King, Jerry M. Brooks, George P. McGill 1995-08-08
5424652 Method and apparatus for testing an unpackaged semiconductor die David R. Hembree, Alan G. Wood 1995-06-13
5419807 Method of providing electrical interconnect between two layers within a silicon substrate, semiconductor apparatus, and method of forming apparatus for testing semiconductor circuitry for operability Salman Akram 1995-05-30
5408190 Testing apparatus having substrate interconnect for discrete die burn-in for nonpackaged die Alan G. Wood, David R. Hembree 1995-04-18
5367253 Clamped carrier for testing of semiconductor dies Alan G. Wood, David R. Hembree 1994-11-22
RE34794 Gull-wing zig-zag inline lead package having end-of-package anchoring pins 1994-11-22
5342807 Soft bond for semiconductor dies Larry D. Kinsman, Derek Gochnour, Alan G. Wood 1994-08-30
5336649 Removable adhesives for attachment of semiconductor dies Larry D. Kinsman, Derek Gochnour, Alan G. Wood 1994-08-09
5326428 Method for testing semiconductor circuitry for operability and method of forming apparatus for testing semiconductor circuitry for operability Malcolm Grief, Gurtej S. Sandhu 1994-07-05
5304842 Dissimilar adhesive die attach for semiconductor devices Rockwell Smith, Walter L. Moden 1994-04-19
5286679 Method for attaching a semiconductor die to a leadframe using a patterned adhesive layer Ed A. Shrock, Scott Clifford, Jerrold L. King, Walter L. Moden 1994-02-15
5256598 Shrink accommodating lead frame Alan G. Wood 1993-10-26
5249450 Probehead for ultrasonic forging Alan G. Wood, David R. Hembree, Larry D. Cromar 1993-10-05
5229327 Process for manufacturing semiconductor device structures cooled by Peltier junctions and electrical interconnect assemblies therefor 1993-07-20
5218168 Leads over tab Steven L. Mitchell 1993-06-08
5218229 Inset die lead frame configuration lead frame for a semiconductor device having means for improved busing and die-lead frame attachment 1993-06-08
5214657 Method for fabricating wafer-scale integration wafers and method for utilizing defective wafer-scale integration wafers Kevin G. Duesman, Ed Heitzeberg 1993-05-25
5180974 Semiconductor testing and shipping system Steven L. Mitchell 1993-01-19
5145099 Method for combining die attach and lead bond in the assembly of a semiconductor package Alan G. Wood, George P. McGill 1992-09-08
5140405 Semiconductor assembly utilizing elastomeric single axis conductive interconnect Jerrold L. King, Jerry M. Brooks, George P. McGill 1992-08-18
5128831 High-density electronic package comprising stacked sub-modules which are electrically interconnected by solder-filled vias Angus C. Fox, III 1992-07-07
5079618 Semiconductor device structures cooled by Peltier junctions and electrical interconnect assemblies 1992-01-07
5062565 Method for combining die attach and wirebond in the assembly of a semiconductor package Alan G. Wood, George P. McGill 1991-11-05