Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5440241 | Method for testing, burning-in, and manufacturing wafer scale integrated circuits and a packaged wafer assembly produced thereby | Jerrold L. King, Jerry M. Brooks, Warren M. Farnworth | 1995-08-08 |
| 5145099 | Method for combining die attach and lead bond in the assembly of a semiconductor package | Alan G. Wood, Warren M. Farnworth | 1992-09-08 |
| 5140405 | Semiconductor assembly utilizing elastomeric single axis conductive interconnect | Jerrold L. King, Jerry M. Brooks, Warren M. Farnworth | 1992-08-18 |
| 5062565 | Method for combining die attach and wirebond in the assembly of a semiconductor package | Alan G. Wood, Warren M. Farnworth | 1991-11-05 |