Issued Patents All Time
Showing 401–425 of 726 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6448143 | Method for using thin spacers and oxidation in gate oxides | Mohamed A. Ditali | 2002-09-10 |
| 6441320 | Electrically conductive projections having conductive coverings | — | 2002-08-27 |
| 6441483 | Die stacking scheme | — | 2002-08-27 |
| 6437451 | Test interconnect for semiconductor components having bumped and planar contacts | Warren M. Farnworth | 2002-08-20 |
| 6437591 | Test interconnect for bumped semiconductor components and method of fabrication | Warren M. Farnworth | 2002-08-20 |
| 6437588 | Circuitry testing substrates | — | 2002-08-20 |
| 6437423 | Method for fabricating semiconductor components with high aspect ratio features | — | 2002-08-20 |
| 6433574 | Interconnect and system for testing bumped semiconductor components with on-board multiplex circuitry for expanding tester resources | C. Patrick Doherty, Jorge L. deVarona | 2002-08-13 |
| 6432818 | Method of using tantalum-aluminum-nitrogen material as diffusion barrier and adhesion layer in semiconductor devices | Scott Meikle | 2002-08-13 |
| 6427676 | Method for sawing wafers employing multiple indexing techniques for multiple die dimensions | Derek Gochnour, Michael E. Hess, David R. Hembree | 2002-08-06 |
| 6426875 | Heat sink chip package | Larry D. Kinsman | 2002-07-30 |
| 6426642 | Insert for seating a microelectronic device having a protrusion and a plurality of raised-contacts | David R. Hembree | 2002-07-30 |
| 6426639 | Method and apparatus for capacitively testing a semiconductor die | Warren M. Farnworth | 2002-07-30 |
| 6426484 | Circuit and method for heating an adhesive to package or rework a semiconductor die | David R. Hembree | 2002-07-30 |
| 6423616 | Method for sawing wafers employing multiple indexing techniques for multiple die dimensions | Derek Gochnour, Michael E. Hess, David R. Hembree | 2002-07-23 |
| 6424033 | Chip package with grease heat sink and method of making | — | 2002-07-23 |
| 6420892 | Calibration target for calibrating semiconductor wafer test systems | Andrew J. Krivy, Warren M. Farnworth, David R. Hembree, James M. Wark, John O. Jacobson | 2002-07-16 |
| 6419844 | Method for fabricating calibration target for calibrating semiconductor wafer test systems | Andrew J. Krivy, Warren M. Farnworth, David R. Hembree, James M. Wark, John O. Jacobson | 2002-07-16 |
| 6420890 | Method and apparatus for capacitively testing a semiconductor die | Warren M. Farnworth | 2002-07-16 |
| 6417685 | Test system having alignment member for aligning semiconductor components | Warren M. Farnworth, Michael E. Hess, David R. Hembree | 2002-07-09 |
| 6417027 | High density stackable and flexible substrate-based devices and systems and methods of fabricating | — | 2002-07-09 |
| 6414506 | Interconnect for testing semiconductor dice having raised bond pads | Warren M. Farnworth, Alan G. Wood | 2002-07-02 |
| 6413862 | Use of palladium in IC manufacturing | Warren M. Farnworth | 2002-07-02 |
| 6410420 | Method of fabricating silicide pattern structures | Y. Jeff Hu | 2002-06-25 |
| 6411507 | Removing heat from integrated circuit devices mounted on a support structure | — | 2002-06-25 |