JJ

Jarvis Benjamin Jacobs

TI Texas Instruments: 21 patents #558 of 12,488Top 5%
Overall (All Time): #204,337 of 4,157,543Top 5%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12015057 Carbon, nitrogen and/or fluorine co-implants for low resistance transistors Mahalingam Nandakumar, Alexei Sadovnikov, Henry Litzmann Edwards 2024-06-18
11121207 Integrated trench capacitor with top plate having reduced voids Binghua Hu, Abbas Ali, Sopa Chevacharoenkul 2021-09-14
10714474 High voltage CMOS with triple gate oxide Binghua Hu, Pinghai Hao, Sameer Pendharkar, Seetharaman Sridhar 2020-07-14
10566200 Method of fabricating transistors, including ambient oxidizing after etchings into barrier layers and anti-reflecting coatings Abbas Ali, Binghua Hu, Stephanie L. Hilbun, Scott Jessen, Ronald Chin 2020-02-18
9865691 Poly sandwich for deep trench fill Binghua Hu, Sameer Pendharkar 2018-01-09
9741718 High voltage CMOS with triple gate oxide Binghua Hu, Pinghai Hao, Sameer Pendharkar, Seetharaman Sridhar 2017-08-22
9583579 Poly sandwich for deep trench fill Binghua Hu, Sameer Pendharkar 2017-02-28
9431286 Deep trench with self-aligned sinker Sameer Pendharkar, Binghua Hu, Abbas Ali, Henry Litzmann Edwards, John P. Erdeljac +1 more 2016-08-30
9401410 Poly sandwich for deep trench fill Binghua Hu, Sameer Pendharkar 2016-07-26
9117687 High voltage CMOS with triple gate oxide Binghua Hu, Pinghai Hao, Sameer Pendharkar, Seetharaman Sridhar 2015-08-25
9054056 Transistor performance using a two-step damage anneal Hiroaki Niimi, Ajith Varghese 2015-06-09
9029251 Transistor performance using a two-step damage anneal Hiroaki Niimi, Ajith Varghese 2015-05-12
8828855 Transistor performance using a two-step damage anneal Hiroaki Niimi, Ajith Varghese 2014-09-09
8802577 Method for manufacturing a semiconductor device using a nitrogen containing oxide layer Hiroaki Niimi, Reima Laaksonen 2014-08-12
7569464 Method for manufacturing a semiconductor device having improved across chip implant uniformity Karen Kirmse, Yuanning Chen, Deborah J. Riley 2009-08-04
7562333 Method and process for generating an optical proximity correction model based on layout density Ashesh Parikh 2009-07-14
7560779 Method for forming a mixed voltage circuit having complementary devices Mark S. Rodder 2009-07-14
6866974 Semiconductor process using delay-compensated exposure Keeho Kim, Reima Laaksonen 2005-03-15
6762130 Method of photolithographically forming extremely narrow transistor gate elements Reima Laaksonen 2004-07-13
6583013 Method for forming a mixed voltage circuit having complementary devices Mark S. Rodder 2003-06-24
5936278 Semiconductor on silicon (SOI) transistor with a halo implant Yin Hu, Theodore W. Houston 1999-08-10