Issued Patents All Time
Showing 25 most recent of 167 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12333422 | High-density neuromorphic computing element | Borna J. Obradovic, Titash Rakshit | 2025-06-17 |
| 12230570 | Integrated circuit with buried power rail and methods of manufacturing the same | Joon Goo Hong, Kang-ill Seo | 2025-02-18 |
| 12080703 | Semiconductor cell blocks having non-integer multiple of cell heights | Vassilios Gerousis, Rwik Sengupta, Joon Goo Hong, Kevin Traynor, Tanya Abaya +1 more | 2024-09-03 |
| 11983622 | High-density neuromorphic computing element | Borna J. Obradovic, Titash Rakshit | 2024-05-14 |
| 11749739 | Method of forming multiple-Vt FETS for CMOS circuit applications | Wei-E Wang | 2023-09-05 |
| 11727258 | Multi-bit, SoC-compatible neuromorphic weight cell using ferroelectric FETs | Borna J. Obradovic, Titash Rakshit, Rwik Sengupta, Joon Goo Hong, Ryan M. Hatcher +1 more | 2023-08-15 |
| 11605574 | Method of forming a thermal shield in a monolithic 3-d integrated circuit | Wei-E Wang, Vassilios Gerousis | 2023-03-14 |
| 11586901 | High-density neuromorphic computing element | Borna J. Obradovic, Titash Rakshit | 2023-02-21 |
| 11552067 | Semiconductor cell blocks having non-integer multiple of cell heights | Vassilios Gerousis, Rwik Sengupta, Joon Goo Hong, Kevin Traynor, Tanya Abaya +1 more | 2023-01-10 |
| 11476121 | Method of forming multi-threshold voltage devices and devices so formed | Wei-E Wang, Borna J. Obradovic | 2022-10-18 |
| 11461620 | Multi-bit, SoC-compatible neuromorphic weight cell using ferroelectric FETs | Borna J. Obradovic, Titash Rakshit, Rwik Sengupta, Joon Goo Hong, Ryan M. Hatcher +1 more | 2022-10-04 |
| 11404405 | Semiconductor device including a repeater/buffer at upper metal routing layers and methods of manufacturing the same | Wei-E Wang, Titash Rakshit, Borna J. Obradovic, Chris Bowen | 2022-08-02 |
| 11290110 | Method and system for providing a variation resistant magnetic junction-based XNOR cell usable in neuromorphic computing | Borna J. Obradovic, Titash Rakshit, Ryan M. Hatcher, Jorge A. Kittl | 2022-03-29 |
| 11233008 | Method of manufacturing an integrated circuit with buried power rail | Joon Goo Hong, Kang-ill Seo | 2022-01-25 |
| 11211493 | Apparatus and method of modulating threshold voltage for fin field effect transistor (FinFET) and nanosheet FET | Joon Goo Hong | 2021-12-28 |
| 11189600 | Method of forming sacrificial self-aligned features for assisting die-to-die and die-to-wafer direct bonding | Wei-E Wang, Vassilios Gerousis | 2021-11-30 |
| 11158738 | Method of forming isolation dielectrics for stacked field effect transistors (FETs) | Wei-E Wang, Vassilios Gerousis | 2021-10-26 |
| 11088258 | Method of forming multiple-Vt FETs for CMOS circuit applications | Wei-E Wang | 2021-08-10 |
| 11081590 | Metal oxide semiconductor field effect transistor with crystalline oxide layer on a III-V material | Wei-E Wang, Robert M. Wallace, Xiaoye Qin | 2021-08-03 |
| 10971420 | Method of forming a thermal shield in a monolithic 3-D integrated circuit | Wei-E Wang, Vassilios Gerousis | 2021-04-06 |
| 10964698 | Field effect transistor with decoupled channel and methods of manufacturing the same | Borna J. Obradovic | 2021-03-30 |
| 10957786 | FinFET with reduced extension resistance and methods of manufacturing the same | Joon Goo Hong, Borna J. Obradovic | 2021-03-23 |
| 10930768 | Low current leakage finFET and methods of making the same | Joon Goo Hong, Borna J. Obradovic, Kang-ill Seo | 2021-02-23 |
| 10916513 | Method and system for providing a reverse engineering resistant hardware embedded security module | Harsono S. Simka, Ganesh Hegde, Joon Goo Hong, Rwik Sengupta | 2021-02-09 |
| 10910313 | Integrated circuit including field effect transistors having a contact on active gate compatible with a small cell area having a small contacted poly pitch | Rwik Sengupta, Joon Goo Hong, Titash Rakshit | 2021-02-02 |