Issued Patents All Time
Showing 51–75 of 167 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10026751 | Semiconductor device including a repeater/buffer at higher metal routing layers and methods of manufacturing the same | Titash Rakshit, Borna J. Obradovic, Rwik Sengupta, Wei-E Wang, Ryan M. Hatcher | 2018-07-17 |
| 10026652 | Horizontal nanosheet FETs and method of manufacturing the same | Wei-E Wang, Borna J. Obradovic, Joon Goo Hong | 2018-07-17 |
| 10008583 | Gate-all-around nanosheet field-effect transistors and methods of manufacturing the same | Joon Goo Hong | 2018-06-26 |
| 10008580 | FET including an InGaAs channel and method of enhancing performance of the FET | Borna J. Obradovic, Titash Rakshit | 2018-06-26 |
| 9978833 | Methods for varied strain on nano-scale field effect transistor devices | Jorge A. Kittl, Joon Goo Hong, Dharmendar Reddy Palle | 2018-05-22 |
| 9960232 | Horizontal nanosheet FETs and methods of manufacturing the same | Borna J. Obradovic, Titash Rakshit | 2018-05-01 |
| 9941405 | Nanosheet and nanowire devices having source/drain stressors and methods of manufacturing the same | Jorge A. Kittl, Wei-E Wang | 2018-04-10 |
| 9917158 | Device contact structures including heterojunctions for low contact resistance | Jorge A. Kittl, Borna J. Obradovic, Robert C. Bowen | 2018-03-13 |
| 9905672 | Method of forming internal dielectric spacers for horizontal nanosheet FET architectures | Wei-E Wang, Borna J. Obradovic, Dharmendar Reddy Palle, Joon Goo Hong | 2018-02-27 |
| 9899529 | Method to make self-aligned vertical field effect transistor | Joon Goo Hong, Borna J. Obradovic | 2018-02-20 |
| 9893187 | Sacrificial non-epitaxial gate stressors | Jorge A. Kittl, Chris Bowen, Kiyotaka Imai | 2018-02-13 |
| 9870940 | Methods of forming nanosheets on lattice mismatched substrates | Wei-E Wang, Borna J. Obradovic | 2018-01-16 |
| 9871139 | Sacrificial epitaxial gate stressors | Jorge A. Kittl, Joon Goo Hong, Dharmendar Reddy Palle | 2018-01-16 |
| 9853114 | Field effect transistor with stacked nanowire-like channels and methods of manufacturing the same | Borna J. Obradovic | 2017-12-26 |
| 9831323 | Structure and method to achieve compressively strained Si NS | Jorge A. Kittl, Ganesh Hegde, Robert C. Bowen, Borna J. Obradovic | 2017-11-28 |
| 9812449 | Multi-VT gate stack for III-V nanosheet devices with reduced parasitic capacitance | Borna J. Obradovic, Titash Rakshit, Wei-E Wang | 2017-11-07 |
| 9793403 | Multi-layer fin field effect transistor devices and methods of forming the same | Borna J. Obradovic, Robert C. Bowen, Titash Rakshit, Wei-E Wang | 2017-10-17 |
| 9773906 | Relaxed semiconductor layers with reduced defects and methods of forming the same | Wei-E Wang, Ganesh Hedge, Christopher Rhys Bowen | 2017-09-26 |
| 9773904 | Vertical field effect transistor with biaxial stressor layer | Borna J. Obradovic, Chris Bowen, Titash Rakshit, Palle Dharmendar | 2017-09-26 |
| 9773886 | Nanosheet and nanowire devices having doped internal spacers and methods of manufacturing the same | Dharmendar Reddy Palle, Jorge A. Kittl | 2017-09-26 |
| 9768062 | Method for forming low parasitic capacitance source and drain contacts | Jorge A. Kittl, David Seo, Kota OIKAWA, Kim Changhwa, Rwik Sengupta | 2017-09-19 |
| 9728502 | Metal oxysilicate diffusion barriers for damascene metallization with low RC delays and methods for forming the same | Ganesh Hegde, Rwik Sengupta, Chris Bowen | 2017-08-08 |
| 9716176 | FinFET semiconductor devices including recessed source-drain regions on a bottom semiconductor layer and methods of fabricating the same | Borna J. Obradovic, Robert C. Bowen | 2017-07-25 |
| 9711414 | Strained stacked nanosheet FETS and/or quantum well stacked nanosheet | Ryan M. Hatcher, Robert C. Bowen, Borna J. Obradovic, Joon Goo Hong | 2017-07-18 |
| 9698234 | Interface layer for gate stack using O3 post treatment | Jorge A. Kittl, Wei-E Wang | 2017-07-04 |