Ashesh Parikh — 16 Patents at Texas Instruments

Ashesh Parikh has been granted 16 US patents while listed as an inventor at Texas Instruments. The first was granted in 2008 and the most recent in June 2024. Ashesh Parikh ranks #284,196 of 4,157,543 US inventors in our database (top 6.8%). Patent records list Ashesh Parikh in Frisco, TX, US.

Patents per Year

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Showing 1–16 of 16 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12020124	Selecting optimum primary and secondary parameters to calibrate and generate an unbiased forecasting model	Afzal Husain, Suresh Aswathnarayana, Paolo Astro, Mercedes Monroy	2024-06-25	$218,866,000
11775852	Network optimization	Afzal Husain, Alon Arad, Suresh Aswathnarayana, Ragnar-Miguel Myhrer, Tejas Rao +3 more	2023-10-03	$235,276,000
10339251	Method to improve transistor matching	Chi-Chien Ho, Thomas John Smelko, Rajni J. Aggarwal	2019-07-02	$22,542,000
9853086	CMOS-based thermopile with reduced thermal conductance	Henry Litzmann Edwards, Toan Tran, Jeffrey R. Debord, Bradley David Sucher	2017-12-26	$16,353,000
9665675	Method to improve transistor matching	Chi-Chien Ho, Thomas John Smelko, Rajni J. Aggarwal	2017-05-30	$10,900,000
9496313	CMOS-based thermopile with reduced thermal conductance	Henry Litzmann Edwards, Toan Tran, Jeffrey R. Debord, Bradley David Sucher	2016-11-15	$11,505,000
8806388	Extraction of imaging parameters for computational lithography using a data weighting algorithm	—	2014-08-12	$6,625,000
8793626	Computational lithography with feature upsizing	Chi-Chien Ho, Thomas John Smelko	2014-07-29	$11,485,000
8394681	Transistor layout for manufacturing process control	Anand Seshadri	2013-03-12	$14,420,000
8015513	OPC models generated from 2D high frequency test patterns	Willie J. Yarbrough	2011-09-06	$6,386,000
7985990	Transistor layout for manufacturing process control	Anand Seshadri	2011-07-26	$16,775,000
7842955	Carbon nanotube transistors on a silicon or SOI substrate	Andrew Marshall	2010-11-30	$12,962,000
7772059	Method for fabricating graphene transistors on a silicon or SOI substrate	Andrew Marshall	2010-08-10	$6,240,000
7687308	Method for fabricating carbon nanotube transistors on a silicon or SOI substrate	Andrew Marshall	2010-03-30	$15,969,000
7562333	Method and process for generating an optical proximity correction model based on layout density	Jarvis Benjamin Jacobs	2009-07-14	$12,487,000
7458058	Verifying a process margin of a mask pattern using intermediate stage models	William R. McKee, Thomas J. Aton	2008-11-25	$6,906,000

Ashesh Parikh — 16 Patents

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