Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10339251 | Method to improve transistor matching | Ashesh Parikh, Thomas John Smelko, Rajni J. Aggarwal | 2019-07-02 |
| 9665675 | Method to improve transistor matching | Ashesh Parikh, Thomas John Smelko, Rajni J. Aggarwal | 2017-05-30 |
| 8793626 | Computational lithography with feature upsizing | Ashesh Parikh, Thomas John Smelko | 2014-07-29 |
| 6261884 | Method of fabricating and operating single polysilicon flash EEPROM with low positive programming and erasing voltage and small cell size | William R. McKee | 2001-07-17 |
| 6054732 | Single polysilicon flash EEPROM with low positive programming and erasing voltage and small cell size | William R. McKee | 2000-04-25 |