Issued Patents All Time
Showing 25 most recent of 58 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11024620 | Integrated circuits and processes for protection of standard cell performance from context effects | Roger Mark Terry, Robert L. Pitts | 2021-06-01 |
| 10756095 | SRAM cell with T-shaped contact | Theodore W. Houston, Scott Jessen | 2020-08-25 |
| 10748913 | SRAM cell with T-shaped contact | Theodore W. Houston, Scott Jessen | 2020-08-18 |
| 10199380 | SRAM cell with T-shaped contact | Theodore W. Houston, Scott Jessen | 2019-02-05 |
| 10192859 | Integrated circuits and processes for protection of standard cell performance from context effects | Roger Mark Terry, Robert L. Pitts | 2019-01-29 |
| 10163911 | SRAM cell with T-shaped contact | Theodore W. Houston, Scott Jessen | 2018-12-25 |
| 9899364 | Method of forming a transistor with an active area layout having both wide and narrow area portions and a gate formed over the intersection of the two | James Walter Blatchford | 2018-02-20 |
| 9343332 | Alignment to multiple layers | Steven Lee Prins, Scott Jessen | 2016-05-17 |
| 9123562 | Layout method to minimize context effects and die area | James Walter Blatchford | 2015-09-01 |
| 9117775 | Alignment to multiple layers | Steven Lee Prins, Scott Jessen | 2015-08-25 |
| 8971084 | Context protection for a column interleaved memory | Lakshmikantha V. Holla, Steve Prins, Dharaneedharan S | 2015-03-03 |
| 8664968 | On-die parametric test modules for in-line monitoring of context dependent effects | Gregory Charles Baldwin, Kayvan Sadra, Oluwamuyiwa Oluwagbemiga Olubuyide, Youn Sung Choi | 2014-03-04 |
| 8663879 | Gate CD control using local design on both sides of neighboring dummy gate level features | James Walter Blatchford, Yong-Seok Choi | 2014-03-04 |
| 8667432 | Gate CD control using local design on both sides of neighboring dummy gate level features | James Walter Blatchford, Yong-Seok Choi | 2014-03-04 |
| 8595656 | Marker layer to facilitate mask build with interactive layers | Gregory Charles Baldwin, Robert L. Pitts | 2013-11-26 |
| 8580685 | Integrated circuit having interleaved gridded features, mask set, and method for printing | Donald L. Plumton | 2013-11-12 |
| 8475976 | Method of fabricating integrated circuit using alternating phase-shift mask and phase-shift trim mask | — | 2013-07-02 |
| 8455180 | Gate CD control using local design on both sides of neighboring dummy gate level features | James Walter Blatchford, Yong-Seok Choi | 2013-06-04 |
| 8446175 | Logic-cell-compatible decoupling capacitor | — | 2013-05-21 |
| 8281262 | Partitioning features of a single IC layer onto multiple photolithographic masks | — | 2012-10-02 |
| 8173544 | Integrated circuit having interleaved gridded features, mask set and method for printing | Donald L. Plumton | 2012-05-08 |
| 7984393 | System and method for making photomasks | Carl A. Vickery | 2011-07-19 |
| 7930656 | System and method for making photomasks | Carl A. Vickery, Frank Scott Johnson, James Walter Blatchford, Benjamen M. Rathsack, Benjamin P. McKee | 2011-04-19 |
| 7927782 | Simplified double mask patterning system | — | 2011-04-19 |
| 7906271 | System and method for making photomasks | — | 2011-03-15 |