Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9236113 | Read assist for an SRAM using a word line suppression circuit | Vinod Menezes, Theodore W. Houston, Michael Patrick Clinton | 2016-01-12 |
| 9082507 | Read assist circuit for an SRAM, including a word line suppression circuit | Vinod Menezes, Theodore W. Houston, Michael Patrick Clinton | 2015-07-14 |
| 8971084 | Context protection for a column interleaved memory | Thomas J. Aton, Steve Prins, Dharaneedharan S | 2015-03-03 |
| 8958254 | High performance two-port SRAM architecture using 8T high performance single port bit cell | Manish Chandra Joshi, Parvinder Kumar Rana | 2015-02-17 |
| 8755239 | Read assist circuit for an SRAM | Vinod Menezes, Theodore W. Houston, Michael Patrick Clinton | 2014-06-17 |
| 8379465 | Combined write assist and retain-till-accessed memory array bias | Michael Patrick Clinton, Vinod Menezes | 2013-02-19 |
| 8320210 | Memory circuit and a tracking circuit thereof | Santhosh Narayanaswamy, Sharad Gupta | 2012-11-27 |
| 8228749 | Margin testing of static random access memory cells | Xiaowei Deng, Wah Kit Loh, Parvinder Kumar Rana | 2012-07-24 |
| 7349285 | Dual port memory unit using a single port memory core | Suresh Balasubramanian, Bryan Sheffield | 2008-03-25 |