Issued Patents All Time
Showing 151–175 of 206 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9842819 | Tall and fine pitch interconnects | Cyprian Emeka Uzoh | 2017-12-12 |
| 9837330 | Fine pitch BVA using reconstituted wafer with area array accessible for testing | — | 2017-12-05 |
| 9831302 | Making electrical components in handle wafers of integrated circuit packages | Liang Wang, Hong Shen | 2017-11-28 |
| 9824974 | Integrated circuit assemblies with rigid layers used for protection against mechanical thinning and for other purposes, and methods of fabricating such assemblies | Guilian Gao, Cyprian Emeka Uzoh, Charles G. Woychik, Hong Shen, Arkalgud R. Sitaram +2 more | 2017-11-21 |
| 9825002 | Flipped die stack | Reynaldo Co, Scott McGrath, Ashok S. Prabhu, Sangil Lee, Liang Wang +1 more | 2017-11-21 |
| 9812406 | Microelectronic assemblies with cavities, and methods of fabrication | Hong Shen, Liang Wang, Charles G. Woychik, Guilian Gao | 2017-11-07 |
| 9799626 | Semiconductor packages and other circuit modules with porous and non-porous stabilizing layers | Cyprian Emeka Uzoh | 2017-10-24 |
| 9793198 | Conductive connections, structures with such connections, and methods of manufacture | Cyprian Emeka Uzoh | 2017-10-17 |
| 9761517 | Porous alumina templates for electronic packages | Cyprian Emeka Uzoh, Belgacem Haba, Ilyas Mohammed | 2017-09-12 |
| 9754866 | Reversed build-up substrate for 2.5D | Liang Wang, Hong Shen, Cyprian Emeka Uzoh, Belgacem Haba | 2017-09-05 |
| 9741696 | Thermal vias disposed in a substrate proximate to a well thereof | Arkalgud R. Sitaram, Cyprian Emeka Uzoh | 2017-08-22 |
| 9735084 | Bond via array for thermal conductivity | Guilian Gao, Charles G. Woychik, Wael Zohni | 2017-08-15 |
| 9728527 | Multiple bond via arrays of different wire heights on a same substrate | Cyprian Emeka Uzoh | 2017-08-08 |
| 9691696 | Interposers with circuit modules encapsulated by moldable material in a cavity, and methods of fabrication | Hong Shen, Liang Wang | 2017-06-27 |
| 9685420 | Localized sealing of interconnect structures in small gaps | Cyprian Emeka Uzoh, Arkalgud R. Sitaram | 2017-06-20 |
| 9673124 | Device and method for localized underfill | Liang Wang, Charles G. Woychik, Cyprian Emeka Uzoh | 2017-06-06 |
| 9666560 | Multi-chip microelectronic assembly with built-up fine-patterned circuit structure | Liang Wang, Guilian Gao, Hong Shen, Belgacem Haba | 2017-05-30 |
| 9666513 | Wafer-level flipped die stacks with leadframes or metal foil interconnects | Ashok S. Prabhu, Sean MORAN | 2017-05-30 |
| 9666514 | High performance compliant substrate | Cyprian Emeka Uzoh | 2017-05-30 |
| 9666559 | Multichip modules and methods of fabrication | Liang Wang, Hong Shen | 2017-05-30 |
| 9646946 | Fan-out wafer-level packaging using metal foil lamination | Xuan Li, Long Huynh, Laura Wills Mirkarimi, Bongsub Lee, Gabriel Z. Guevara +3 more | 2017-05-09 |
| 9646917 | Low CTE component with wire bond interconnects | Cyprian Emeka Uzoh | 2017-05-09 |
| 9615451 | Porous alumina templates for electronic packages | Cyprian Emeka Uzoh, Belgacem Haba, Ilyas Mohammed | 2017-04-04 |
| 9601467 | Microelectronic package with horizontal and vertical interconnections | Cyprian Emeka Uzoh | 2017-03-21 |
| 9583411 | Fine pitch BVA using reconstituted wafer with area array accessible for testing | — | 2017-02-28 |