Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11587836 | Method of manufacturing a semiconductor structure by forming a mask layer using side wall spacers as an alignment mark | Song Bai, Qi Liang Ma, Tao Song | 2023-02-21 |
| 10332854 | Anchoring structure of fine pitch bva | Rajesh Katkar, Gabriel Z. Guevara, Cyprian Emeka Uzoh, Guilian Gao, Liang Wang | 2019-06-25 |
| 10008469 | Wafer-level packaging using wire bond wires in place of a redistribution layer | Rajesh Katkar, Tu Tam Vu, Bongsub Lee, Kyong-Mo Bang, Long Huynh +4 more | 2018-06-26 |
| 9847238 | Fan-out wafer-level packaging using metal foil lamination | Rajesh Katkar, Long Huynh, Laura Wills Mirkarimi, Bongsub Lee, Gabriel Z. Guevara +3 more | 2017-12-19 |
| 9646946 | Fan-out wafer-level packaging using metal foil lamination | Rajesh Katkar, Long Huynh, Laura Wills Mirkarimi, Bongsub Lee, Gabriel Z. Guevara +3 more | 2017-05-09 |
| 9543277 | Wafer level packages with mechanically decoupled fan-in and fan-out areas | Bongsub Lee, Tu Tam Vu, Rajesh Katkar, Laura Wills Mirkarimi, Akash Agrawal +3 more | 2017-01-10 |
| 9502372 | Wafer-level packaging using wire bond wires in place of a redistribution layer | Rajesh Katkar, Tu Tam Vu, Bongsub Lee, Kyong-Mo Bang, Long Huynh +4 more | 2016-11-22 |