Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Bongsub Lee — 18 Patents

INInvensas: 8 patents #43 of 142Top 35%
ATAdeia Semiconductor Bonding Technologies: 6 patents #14 of 46Top 35%
ITInvensas Bonding Technologies: 3 patents #15 of 21Top 75%
Santa Clara, CA: #916 of 9,301 inventorsTop 10%
California: #33,102 of 386,348 inventorsTop 9%
Overall (All Time): #245,716 of 4,157,543Top 6%
18 Patents All Time
Bongsub Lee has been granted 18 US patents while listed as an inventor at Invensas. The first was granted in 2016 and the most recent in October 2025. Bongsub Lee ranks #245,716 of 4,157,543 US inventors in our database (top 5.9%). Patent records list Bongsub Lee in Santa Clara, CA, US.

Issued Patents All Time

Showing 1–18 of 18 patents

Patent #TitleCo-InventorsDate
12444661 Pattern design for integrated circuits and method for inspecting the pattern design for integrated circuits Jong Soo Baek, Jin-Yub Lee, Min Soo Kang, Hyun Ah Roh 2025-10-14
12243851 Offset pads over TSV Guilian Gao 2025-03-04
12205926 TSV as pad Guilian Gao, Gaius Gillman Fountain, Jr., Cyprian Emeka Uzoh, Belgacem Haba, Laura Wills Mirkarimi +1 more 2025-01-21
11955445 Metal pads over TSV Guilian Gao, Gaius Gillman Fountain, Jr., Cyprian Emeka Uzoh, Laura Wills Mirkarimi, Belgacem Haba +1 more 2024-04-09
11955393 Structures for bonding elements including conductive interface features Rajesh Katkar, Laura Wills Mirkarimi, Gaius Gillman Fountain, Jr., Cyprian Emeka Uzoh 2024-04-09
11749645 TSV as pad Guilian Gao, Gaius Gillman Fountain, Jr., Cyprian Emeka Uzoh, Belgacem Haba, Laura Wills Mirkarimi +1 more 2023-09-05
11728313 Offset pads over TSV Guilian Gao 2023-08-15
11393779 Large metal pads over TSV Guilian Gao, Gaius Gillman Fountain, Jr., Cyprian Emeka Uzoh, Laura Wills Mirkarimi, Belgacem Haba +1 more 2022-07-19
11004757 Bonded structures Rajesh Katkar, Laura Wills Mirkarimi, Gaius Gillman Fountain, Jr., Cyprian Emeka Uzoh 2021-05-11
10998292 Offset pads over TSV Guilian Gao 2021-05-04
10600761 Nanoscale interconnect array for stacked dies Liang Wang, Belgacem Haba, Sangil Lee 2020-03-24
10304803 Nanoscale interconnect array for stacked dies Liang Wang, Belgacem Haba, Sangil Lee 2019-05-28
10008469 Wafer-level packaging using wire bond wires in place of a redistribution layer Rajesh Katkar, Tu Tam Vu, Kyong-Mo Bang, Xuan Li, Long Huynh +4 more 2018-06-26
9859234 Methods and structures to repair device warpage Cyprian Emeka Uzoh, Guilian Gao, Scott McGrath, Hong Shen, Charles G. Woychik +2 more 2018-01-02
9847238 Fan-out wafer-level packaging using metal foil lamination Xuan Li, Rajesh Katkar, Long Huynh, Laura Wills Mirkarimi, Gabriel Z. Guevara +3 more 2017-12-19
9646946 Fan-out wafer-level packaging using metal foil lamination Xuan Li, Rajesh Katkar, Long Huynh, Laura Wills Mirkarimi, Gabriel Z. Guevara +3 more 2017-05-09
9543277 Wafer level packages with mechanically decoupled fan-in and fan-out areas Tu Tam Vu, Rajesh Katkar, Laura Wills Mirkarimi, Akash Agrawal, Kyong-Mo Bang +3 more 2017-01-10
9502372 Wafer-level packaging using wire bond wires in place of a redistribution layer Rajesh Katkar, Tu Tam Vu, Kyong-Mo Bang, Xuan Li, Long Huynh +4 more 2016-11-22