Issued Patents All Time
Showing 26–50 of 155 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9423959 | Method and apparatus for store durability and ordering in a persistent memory architecture | Subramanya R. Dulloor, Sanjay Kumar, Rajesh M. Sankaran, Gilbert Neiger, Richard Uhlig +7 more | 2016-08-23 |
| 9418700 | Bad block management mechanism | Raj K. Ramanujan, David J. Zimmerman | 2016-08-16 |
| 9378142 | Apparatus and method for implementing a multi-level memory hierarchy having different operating modes | Raj K. Ramanujan, Rajat Agarwal | 2016-06-28 |
| 9146873 | Adaptive queuing of a cache for a processing element | Anil Vasudevan, Yadong Li | 2015-09-29 |
| 9141461 | Machine check architecture execution environment for non-microcoded processor | Willam C. Rash, Scott D. Hanh | 2015-09-22 |
| 9087584 | Two-level system main memory | Eric J. Dahlen, Raj K. Ramanujan | 2015-07-21 |
| 9081688 | Obtaining data for redundant multithreading (RMT) execution | Steven Raasch, Sebastien Hily, John G. Holm, Ronak Singhal, Avinash Sodani +4 more | 2015-07-14 |
| RE45487 | Processor having execution core sections operating at different clock rates | David J. Sager, Thomas D. Fletcher, Michael D. Upton | 2015-04-21 |
| 8793689 | Redundant multithreading processor | Steven Raasch, Avinash Sodani, Sebastien Hily, John G. Holm, Ronak Singhal +1 more | 2014-07-29 |
| 8631259 | Method and apparatus for quick resumption of a processing system with volatile memory | Michael A. Rothman, Vincent J. Zimmer, Michael Kinney, Mark Doran | 2014-01-14 |
| 8612676 | Two-level system main memory | Eric J. Dahlen, Raj K. Ramanujan | 2013-12-17 |
| RE44494 | Processor having execution core sections operating at different clock rates | David J. Sager, Thomas D. Fletcher, Michael D. Upton | 2013-09-10 |
| 8510536 | Vector completion mask handling | Stephan Jourdan, Michael A. Fetterman, Michael Cornaby, Per Hammarlund, Ronak Signhal | 2013-08-13 |
| 8433854 | Apparatus and method for cache utilization | R. Scott Tetrick, Dale Juenemann, Jordan Howes, Jeanna N. Matthews, Steven Wells +1 more | 2013-04-30 |
| 8407489 | Method and apparatus for quick resumption | Michael A. Rothman, Mark Doran, Vincent J. Zimmer, Michael Kinney | 2013-03-26 |
| 8386823 | Method and apparatus for cost and power efficient, scalable operating system independent services | Arvind Kumar, Per Hammarlund, Johan G. Van De Groenendaal | 2013-02-26 |
| 8239659 | Vector completion mask handling | Stephan Jourdan, Michael A. Fetterman, Michael Cornaby, Per Hammarlund, Ronak Signhal | 2012-08-07 |
| 8219757 | Apparatus and method for low touch cache management | Dale Juenemann, R. Scott Tetrick | 2012-07-10 |
| 8171321 | Method and apparatus for cost and power efficient, scalable operating system independent services | Arvind Kumar, Per Hammarlund, Johan G. Van De Groenendaal | 2012-05-01 |
| 8171219 | Method and system to perform caching based on file-level heuristics | Sanjeev N. Trika, Amber D. Huffman, James A. Boyd, Frank T. Hady, Dale Juenemann +4 more | 2012-05-01 |
| 8095932 | Providing quality of service via thread priority in a hyper-threaded microprocessor | Matthew C. Merten, Santhosh Srinath, Morris Marden, John G. Holm | 2012-01-10 |
| 7856633 | LRU cache replacement for a partitioned set associative cache | Chan Woo Lee, Robert F. Krick | 2010-12-21 |
| 7757045 | Synchronizing recency information in an inclusive cache hierarchy | Christopher Shannon, Ronak Singhal, Per Hammarlund, Hermann W. Gartler | 2010-07-13 |
| 7567471 | High speed fanned out system architecture and input/output circuits for non-volatile memory | Sean S. Eilert, Rodney R. Rozman, Shekoufeh Qawami | 2009-07-28 |
| 7523323 | Method and apparatus for quick resumption | Michael A. Rothman, Mark Doran, Vincent J. Zimmer, Michael Kinney | 2009-04-21 |