GG

Glenn A. Glass

IN Intel: 165 patents #82 of 30,777Top 1%
DP Daedalus Prime: 5 patents #1 of 21Top 5%
TR Tahoe Research: 2 patents #16 of 215Top 8%
Motorola: 1 patents #6,475 of 12,470Top 55%
📍 Portland, OR: #38 of 9,213 inventorsTop 1%
🗺 Oregon: #78 of 28,073 inventorsTop 1%
Overall (All Time): #4,585 of 4,157,543Top 1%
173
Patents All Time

Issued Patents All Time

Showing 151–173 of 173 patents

Patent #TitleCo-InventorsDate
9202889 Method for improving transistor performance through reducing the salicide interface resistance Anand S. Murthy, Boyan Boyanov, Thomas Hoffman 2015-12-01
9184294 High mobility strained channels for fin-based transistors Stephen M. Cea, Anand S. Murthy, Daniel B. Aubertine, Tahir Ghani, Jack T. Kavalieros +1 more 2015-11-10
9153583 III-V layers for N-type and P-type MOS source-drain contacts Anand S. Murthy, Tahir Ghani 2015-10-06
9129827 Conversion of strain-inducing buffer to electrical insulator Annalisa Cappellani, Van H. Le, Kelin J. Kuhn, Stephen M. Cea 2015-09-08
9117791 Selective germanium P-contact metalization through trench Anand S. Murthy, Tahir Ghani 2015-08-25
9059024 Self-aligned contact metallization for reduced contact resistance Anand S. Murthy, Tahir Ghani 2015-06-16
9012284 Nanowire transistor devices and forming techniques Kelin J. Kuhn, Seiyon Kim, Anand S. Murthy, Daniel B. Aubertine 2015-04-21
8994104 Contact resistance reduction employing germanium overlayer pre-contact metalization Anand S. Murthy, Tahir Ghani 2015-03-31
8957476 Conversion of thin transistor elements from silicon to silicon germanium Daniel B. Aubertine, Anand S. Murthy, Gaurav Thareja, Stephen M. Cea 2015-02-17
8901537 Transistors with high concentration of boron doped germanium Anand S. Murthy, Tahir Ghani, Ravi Pillarisetty, Niloy Mukherjee, Jack T. Kavalieros +3 more 2014-12-02
8896066 Tin doped III-V material contacts Anand S. Murthy, Michael Jackson, Harold W. Kennel 2014-11-25
8847281 High mobility strained channels for fin-based transistors Stephen M. Cea, Anand S. Murthy, Daniel B. Aubertine, Tahir Ghani, Jack T. Kavalieros +1 more 2014-09-30
8482043 Method for improving transistor performance through reducing the salicide interface resistance Anand S. Murthy, Boyan Boyanov, Thomas Hoffman 2013-07-09
7812394 CMOS transistor junction regions formed by a CVD etching and deposition sequence Anand S. Murthy, Andrew N. Westmeyer, Michael L. Hattendorf, Jeffrey R. Wank 2010-10-12
7678631 Formation of strain-inducing films Anand S. Murthy, Michael L. Hattendorf 2010-03-16
7479432 CMOS transistor junction regions formed by a CVD etching and deposition sequence Anand S. Murthy, Andrew N. Westmeyer, Michael L. Hattendorf, Jeffrey R. Wank 2009-01-20
7402872 Method for forming an integrated circuit Anand S. Murthy, Andrew N. Westmeyer, Michael L. Hattendorf, Tahir Ghani 2008-07-22
7358547 Selective deposition to improve selectivity and structures formed thereby Anand S. Murthy, Nayanee Gupta, Chris Auth 2008-04-15
7274055 Method for improving transistor performance through reducing the salicide interface resistance Anand S. Murthy, Boyan Boyanov, Thomas Hoffmann 2007-09-25
7195985 CMOS transistor junction regions formed by a CVD etching and deposition sequence Anand S. Murthy, Andrew N. Westmeyer, Michael L. Hattendorf, Jeffrey R. Wank 2007-03-27
7129139 Methods for selective deposition to improve selectivity Anand S. Murthy, Nayanee Gupta, Chris Auth 2006-10-31
6949482 Method for improving transistor performance through reducing the salicide interface resistance Anand S. Murthy, Boyan Boyanov, Thomas Hoffmann 2005-09-27
6097627 Quantum random address memory with nano-diode mixer William M. Peterson, Daniel S. Marshall 2000-08-01