Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10424517 | Method for manufacturing a dual work function semiconductor device and the semiconductor device made thereof | Joshua Tseng, Yasutoshi Okuno, Lars-Ake Ragnarsson, Tom Schram, Stefan Kubicek +1 more | 2019-09-24 |
| 9437710 | Method for improving transistor performance through reducing the salicide interface resistance | Anand S. Murthy, Boyan Boyanov, Glenn A. Glass | 2016-09-06 |
| 9202889 | Method for improving transistor performance through reducing the salicide interface resistance | Anand S. Murthy, Boyan Boyanov, Glenn A. Glass | 2015-12-01 |
| 8912055 | Method for manufacturing a hybrid MOSFET device and hybrid MOSFET obtainable thereby | Matty Caymax, Niamh Waldron, Geert Hellings | 2014-12-16 |
| 8482043 | Method for improving transistor performance through reducing the salicide interface resistance | Anand S. Murthy, Boyan Boyanov, Glenn A. Glass | 2013-07-09 |
| 6982433 | Gate-induced strain for MOS performance improvement | Stephen M. Cea, Martin D. Giles | 2006-01-03 |