AW

Andrew N. Westmeyer

IN Intel: 11 patents #3,700 of 30,777Top 15%
Overall (All Time): #465,310 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8426858 Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain Michael L. Hattendorf, Jack Hwang, Anand S. Murthy 2013-04-23
8344452 Metal gate transistors with raised source and drain regions formed on heavily doped substrate Nick Lindert, Justin K. Brask 2013-01-01
7858981 Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain Michael L. Hattendorf, Jack Hwang, Anand S. Murthy 2010-12-28
7812394 CMOS transistor junction regions formed by a CVD etching and deposition sequence Anand S. Murthy, Glenn A. Glass, Michael L. Hattendorf, Jeffrey R. Wank 2010-10-12
7479432 CMOS transistor junction regions formed by a CVD etching and deposition sequence Anand S. Murthy, Glenn A. Glass, Michael L. Hattendorf, Jeffrey R. Wank 2009-01-20
7479431 Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain Michael L. Hattendorf, Jack Hwang, Anand S. Murthy 2009-01-20
7427775 Fabricating strained channel epitaxial source/drain transistors Anand S. Murthy, Justin K. Brask, Boyan Boyanov, Nick Lindert 2008-09-23
7402872 Method for forming an integrated circuit Anand S. Murthy, Glenn A. Glass, Michael L. Hattendorf, Tahir Ghani 2008-07-22
7332439 Metal gate transistors with epitaxial source and drain regions Nick Lindert, Justin K. Brask 2008-02-19
7226842 Fabricating strained channel epitaxial source/drain transistors Anand S. Murthy, Justin K. Brask, Boyan Boyanov, Nick Lindert 2007-06-05
7195985 CMOS transistor junction regions formed by a CVD etching and deposition sequence Anand S. Murthy, Glenn A. Glass, Michael L. Hattendorf, Jeffrey R. Wank 2007-03-27