Issued Patents All Time
Showing 51–75 of 115 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8601242 | Adaptive optimized compare-exchange operation | Joshua B. Fryman, Andrew T. Forsyth | 2013-12-03 |
| 8533436 | Adaptively handling remote atomic execution based upon contention prediction | Joshua B. Fryman, Toni Juan, Andrew T. Forsyth, John Cruz Mejia, Ramacharan Sundararaman +3 more | 2013-09-10 |
| 8125246 | Method and apparatus for late timing transition detection | Chris Wilkerson, Shih-Lien Linus Lu, Murali Annavaram | 2012-02-28 |
| 7742910 | Mechanism for estimating and controlling di/dt-induced power supply voltage variations | David J. Sager, Vivek Tiwari, Ian A. Young, David J. Ayers | 2010-06-22 |
| 7622961 | Method and apparatus for late timing transition detection | Chris Wilkerson, Shih-Lien Linus Lu, Murali Annavaram | 2009-11-24 |
| 7516312 | Presbyopic branch target prefetch method and apparatus | Hong Wang, Ralph M. Kling, Kalpana Ramakrishnan | 2009-04-07 |
| 7480838 | Method, system and apparatus for detecting and recovering from timing errors | Chris Wilkerson, Shih-Lien Linus Lu, Murali Annavaram | 2009-01-20 |
| 7437581 | Method and apparatus for varying energy per instruction according to the amount of available parallelism | John Shen, Hong Wang, Doron Orenstein, Gad Sheaffer, Ronny Ronen +1 more | 2008-10-14 |
| 7395304 | Method and apparatus for performing single-cycle addition or subtraction and comparison in redundant form arithmetic | Bharat Bhushan, Vinod Sharma, John H. Crawford | 2008-07-01 |
| 7380111 | Out-of-order processing with predicate prediction and validation with correct RMW partial write new predicate register values | Jared W. Stark, IV | 2008-05-27 |
| 7340643 | Replay mechanism for correcting soft errors | William C. Rash, Nhon Quach | 2008-03-04 |
| 7315920 | Circuit and method for protecting vector tags in high performance microprocessors | Nhon Quach, John H. Crawford, Greg Mathews, Chakravarthy Kosaraju | 2008-01-01 |
| 7281140 | Digital throttle for multiple operating points | James S. Burns, Stefan Rusu, David J. Ayers, Marsha Eng, Vivek Tiwari | 2007-10-09 |
| 7236920 | Mechanism for estimating and controlling di/dt-induced power supply voltage variations | David J. Sager, Vivek Tiwari, Ian A. Young, David J. Ayers | 2007-06-26 |
| 7111154 | Method and apparatus for NOP folding | Jeffrey P. Rupley, II, Edward A. Brekelbaum | 2006-09-19 |
| 7085919 | Predicate prediction based on a predicated predicate value | Hans Mulder, Vincent E. Hummel | 2006-08-01 |
| 7062639 | Method and apparatus for performing predicate prediction | Hans Mulder | 2006-06-13 |
| 7035785 | Mechanism for estimating and controlling di/dt-induced power supply voltage variations | David J. Sager, Vivek Tiwari, Ian A. Young, David J. Ayers | 2006-04-25 |
| 7020590 | Simulation of di/dt-induced power supply voltage variation | David J. Ayers, Vivek Tiwari | 2006-03-28 |
| 6954848 | Marking in history table instructions slowable/delayable for subsequent executions when result is not used immediately | Ryan Rakvic, Christopher B. Wilkerson, Bryan Black, John Shen, Edward A. Brekelbaum | 2005-10-11 |
| 6938126 | Cache-line reuse-buffer | Alejandro Ramirez, Hong Wang, John Shen | 2005-08-30 |
| 6931559 | Multiple mode power throttle mechanism | James S. Burns, Stefan Rusu, David J. Ayers, Marsha Eng, Vivek Tiwari | 2005-08-16 |
| 6928645 | Software-based speculative pre-computation and multithreading | Hong Wang, Jamison D. Collins, John Shen, Bryan Black, Perry Wang +1 more | 2005-08-09 |
| 6904502 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Nhon Quach, John H. Crawford, Greg Mathews, Chakravarthy Kosaraju | 2005-06-07 |
| 6857051 | Method and apparatus for maintaining cache coherence in a computer system | Vinod Sharma | 2005-02-15 |