WR

William C. Rash

IN Intel: 15 patents #2,741 of 30,777Top 9%
Overall (All Time): #305,627 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12229581 Virtualization and multi-tenancy support in graphics processors Rajesh M. Sankaran, Bret L. Toll, Subramaniam Maiyuran, Gang Chen, Varghese George 2025-02-18
11900114 Systems and methods to skip inconsequential matrix operations Elmoustapha Ould-Ahmed-Vall, Subramaniam Maiyuran, Varghese George, Rajesh M. Sankaran 2024-02-13
11748130 Virtualization and multi-tenancy support in graphics processors Rajesh M. Sankaran, Bret L. Toll, Subramaniam Maiyuran, Gang Chen, Varghese George 2023-09-05
11403097 Systems and methods to skip inconsequential matrix operations Elmoustapha Ould-Ahmed-Vall, Subramaniam Maiyuran, Varghese George, Rajesh M. Sankaran 2022-08-02
10235175 Processors, methods, and systems to relax synchronization of accesses to shared memory Martin G. Dixon, Yazmin A. Santiago 2019-03-19
10073513 Protected power management mode in a processor Martin G. Dixon, Yazmin A. Santiago 2018-09-11
9703562 Instruction emulation processors, methods, and systems Bret L. Toll, Scott D. Hahn, Glenn J. Hinton 2017-07-11
9395990 Mode dependent partial width load to wider register processors, methods, and systems Yazmin A. Santiago, Martin G. Dixon 2016-07-19
9354681 Protected power management mode in a processor Martin G. Dixon, Yazmin A. Santiago 2016-05-31
9323535 Instruction order enforcement pairs of instructions, processors, methods, and systems Martin G. Dixon, Yazmin A. Santiago 2016-04-26
9304940 Processors, methods, and systems to relax synchronization of accesses to shared memory Martin G. Dixon, Yazmin A. Santiago 2016-04-05
9202056 Inter-processor attestation hardware Martin G. Dixon, Yazmin A. Santiago 2015-12-01
7340643 Replay mechanism for correcting soft errors Edward T. Grochowski, Nhon Quach 2008-03-04
6625756 Replay mechanism for soft error recovery Edward T. Grochowski, Nhon Quach 2003-09-23
6615366 Microprocessor with dual execution core operable in high reliability mode Edward T. Grochowski, Nhon Quach, Hang T. Nguyen, Andres Rabago 2003-09-02