Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| D1091349 | Modular scale | Levi Lalla, Ilya Polyakov | 2025-09-02 |
| 8090869 | Priority-biased exit queue arbitration with fairness | — | 2012-01-03 |
| 7315920 | Circuit and method for protecting vector tags in high performance microprocessors | Nhon Quach, John H. Crawford, Edward T. Grochowski, Chakravarthy Kosaraju | 2008-01-01 |
| 6904502 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Nhon Quach, John H. Crawford, Edward T. Grochowski, Chakravarthy Kosaraju | 2005-06-07 |
| 6839814 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Nhon Quach, John H. Crawford, Edward T. Grochowski, Chakravarthy Kosaraju | 2005-01-04 |
| 6775746 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Nhon Quach, John H. Crawford, Edward T. Grochowski, Chakravarthy Kosaraju | 2004-08-10 |
| 6728800 | Efficient performance based scheduling mechanism for handling multiple TLB operations | Allisa Lee | 2004-04-27 |
| 6675266 | Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors | Nhon Quach, John H. Crawford, Edward T. Grochowski, Chakravarthy Kosaraju | 2004-01-06 |