Issued Patents All Time
Showing 151–175 of 605 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11152264 | Multi-Vt scheme with same dipole thickness for gate-all-around transistors | Jingyun Zhang, Alexander Reznicek | 2021-10-19 |
| 11152510 | Long channel optimization for gate-all-around transistors | Jingyun Zhang, Choonghyun Lee, Pouya Hashemi, Alexander Reznicek | 2021-10-19 |
| 11145811 | Resistive memory with core and shell oxides and interface dipoles | Jianshi Tang, Praneet Adusumilli, Reinaldo Vega | 2021-10-12 |
| 11145816 | Resistive random access memory cells integrated with vertical field effect transistor | Alexander Reznicek, Bahman Hekmatshoartabari, Karthik Balakrishnan | 2021-10-12 |
| 11145814 | Phase change memory with conductive bridge filament | Nanbo Gong, Guy M. Cohen | 2021-10-12 |
| 11139215 | Hybrid gate stack integration for stacked vertical transport field-effect transistors | Tenko Yamashita, Oleg Gluschenkov, Chen Zhang, Koji Watanabe | 2021-10-05 |
| 11133305 | Nanosheet P-type transistor with oxygen reservoir | Jingyun Zhang, Choonghyun Lee | 2021-09-28 |
| 11133309 | Multi-threshold voltage gate-all-around transistors | Jingyun Zhang, Choonghyun Lee | 2021-09-28 |
| 11121259 | Metal-oxide-based neuromorphic device | John Rozen, Teodor K. Todorov, Jianshi Tang | 2021-09-14 |
| 11121209 | Surface area enhancement for stacked metal-insulator-metal (MIM) capacitor | Eduard A. Cartier, Hemanth Jagannathan, Paul C. Jamison, Vijay Narayanan | 2021-09-14 |
| 11121218 | Gate-all-around transistor structure | Jingyun Zhang, Choonghyun Lee | 2021-09-14 |
| 11107984 | Protuberant contacts for resistive switching devices | Chih-Chao Yang, Lawrence A. Clevenger | 2021-08-31 |
| 11101323 | RRAM cells in crossbar array architecture | Dexin Kong, Kangguo Cheng, Juntao Li | 2021-08-24 |
| 11101322 | RRAM cells in crossbar array architecture | Dexin Kong, Kangguo Cheng, Juntao Li | 2021-08-24 |
| 11088205 | High-density field-enhanced ReRAM integrated with vertical transistors | Pouya Hashemi, Alexander Reznicek | 2021-08-10 |
| 11088139 | Asymmetric threshold voltage VTFET with intrinsic dual channel epitaxy | Choonghyun Lee, Jingyun Zhang, Alexander Reznicek, Pouya Hashemi | 2021-08-10 |
| 11081404 | Source/drain for gate-all-around devices | Jingyun Zhang, Alexander Reznicek, Choonghyun Lee | 2021-08-03 |
| 11075338 | Resistive memory cell structure | Alexander Reznicek, Bahman Hekmatshoartabari | 2021-07-27 |
| 11075301 | Nanosheet with buried gate contact | Jingyun Zhang, Choonghyun Lee, Alexander Reznicek, Pouya Hashemi | 2021-07-27 |
| 11064120 | Imaging-element inclination adjustment mechanism, method for adjusting inclination of imaging element, and imaging apparatus | — | 2021-07-13 |
| 11063089 | Resistive memory device with meshed electrodes | Lawrence A. Clevenger, Chih-Chao Yang, Michael Rizzolo | 2021-07-13 |
| 11062955 | Vertical transistors having uniform channel length | Choonghyun Lee, Jingyun Zhang, Alexander Reznicek, Pouya Hashemi | 2021-07-13 |
| 11050023 | CBRAM with controlled bridge location | Jianshi Tang, Reinaldo Vega, Praneet Adusumilli | 2021-06-29 |
| 11044362 | Telephone exchange system and telephone exchange apparatus and method, non-transitory computer readable medium storing program | Hideo Maki, Yasuaki Kaneda | 2021-06-22 |
| 11043634 | Confining filament at pillar center for memory devices | Dexin Kong, Kangguo Cheng, Juntao Li | 2021-06-22 |