Issued Patents All Time
Showing 176–200 of 265 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6420761 | Asymmetrical semiconductor device for ESD protection | Robert J. Gauthier, Jr. | 2002-07-16 |
| 6411480 | Substrate pumped ESD network with trench structure | Robert J. Gauthier, Jr. | 2002-06-25 |
| 6410962 | Structure for SOI wafers to avoid electrostatic discharge | Stephen F. Geissler | 2002-06-25 |
| 6404275 | Modified current mirror circuit for BiCMOS application | Stephen J. Ames | 2002-06-11 |
| 6404269 | Low power SOI ESD buffer driver networks having dynamic threshold MOSFETS | — | 2002-06-11 |
| 6396107 | Trench-defined silicon germanium ESD diode network | Ciaran J. Brennan, Douglas B. Hershberger, Mankoo Lee, Nicholas Theodore Schmidt | 2002-05-28 |
| 6387742 | Thermal conductivity enhanced semiconductor structures and fabrication processes | Robert J. Gauthier, Jr., Dominic J. Schepis, William R. Tonti | 2002-05-14 |
| 6384468 | Capacitor and method for forming same | Kerry Bernstein, Nicholas Theodore Schmidt, Anthony K. Stamper, Stephen A. St. Onge | 2002-05-07 |
| 6380570 | Gate overvoltage control networks | — | 2002-04-30 |
| 6369994 | Method and apparatus for handling an ESD event on an SOI integrated circuit | — | 2002-04-09 |
| 6359750 | Data storage system with TiC MR-head magnetic shield dummy shield spark gap | Timothy Scott Hughbanks, Neil Leslie Robertson, Albert John Wallash | 2002-03-19 |
| 6352905 | Method and structure of high and low K buried oxide for SOI technology | Robert J. Gauthier, Jr., Dominic J. Schepis | 2002-03-05 |
| 6331726 | SOI voltage dependent negative-saturation-resistance resistor ballasting element for ESD protection of receivers and driver circuitry | — | 2001-12-18 |
| 6323522 | Silicon on insulator thick oxide structure and process of manufacture | Michael Hargrove, Mario M. Pelella | 2001-11-27 |
| 6294419 | Structure and method for improved latch-up using dual depth STI with impurity implant | Jeffrey S. Brown, Robert J. Gauthier, Jr., Randy W. Mann | 2001-09-25 |
| 6292343 | ASIC book to provide ESD protection on an integrated circuit | James P. Pequignot, Tariq Rahman, Jeffrey H. Sloan, Douglas W. Stout | 2001-09-18 |
| 6288880 | Method of making TiC MR-head magnetic shield dummy shield spark gap | Timothy Scott Hughbanks, Neil Leslie Robertson, Albert John Wallash | 2001-09-11 |
| 6288426 | Thermal conductivity enhanced semiconductor structures and fabrication processes | Robert J. Gauthier, Jr., Dominic J. Schepis, William R. Tonti | 2001-09-11 |
| 6281593 | SOI MOSFET body contact and method of fabrication | Jeffrey S. Brown, Andres Bryant, Robert J. Gauthier, Jr. | 2001-08-28 |
| 6268286 | Method of fabricating MOSFET with lateral resistor with ballasting | Robert J. Gauthier, Jr., Randy W. Mann | 2001-07-31 |
| 6262873 | Method for providing ESD protection for an integrated circuit | James P. Pequignot, Tariq Rahman, Jeffrey H. Sloan, Douglas W. Stout | 2001-07-17 |
| 6256184 | Method and apparatus for providing electrostatic discharge protection | Robert John GAUTHIER JR., Edward J. Nowak, Richard Q. Williams | 2001-07-03 |
| 6255178 | Method for forming transistors with raised source and drains and device formed thereby | Jeffrey S. Brown, James S. Dunn, Steven J. Holmes, David V. Horak, Robert K. Leidy | 2001-07-03 |
| 6245600 | Method and structure for SOI wafers to avoid electrostatic discharge | Stephen F. Geissler | 2001-06-12 |
| 6236103 | Integrated high-performance decoupling capacitor and heat sink | Kerry Bernstein, Robert M. Geffken, Wilbur D. Pricer, Anthony K. Stamper | 2001-05-22 |