Issued Patents All Time
Showing 26–49 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7400162 | Integrated circuit testing methods using well bias modification | Anne Elizabeth Gattiker, David A. Grosch, Marc D. Knox, Franco Motika, Phil Nigh +1 more | 2008-07-15 |
| 7373567 | System and method of providing error detection and correction capability in an integrated circuit using redundant logic cells of an embedded FPGA | John M. Cohn, Christopher B. Reynolds, Sebastian T. Ventrone | 2008-05-13 |
| 7289659 | Method and apparatus for manufacturing diamond shaped chips | Robert J. Allen, John M. Cohn, Scott Whitney Gould, Peter A. Habitz, Juergen Koehl +2 more | 2007-10-30 |
| 7131074 | Nested voltage island architecture | Thomas R. Bednar, Scott Whitney Gould, David E. Lackey, Douglas W. Stout | 2006-10-31 |
| 7095063 | Multiple supply gate array backfill structure | John M. Cohn, Kevin Grosselfinger, William F. Smith | 2006-08-22 |
| 7096436 | Macro design techniques to accommodate chip level wiring and circuit placement across the macro | Thomas R. Bednar, Paul E. Dunn, Scott Whitney Gould, Jeannie H. Panner | 2006-08-22 |
| 6993692 | Method, system and apparatus for aggregating failures across multiple memories and applying a common defect repair solution to all of the multiple memories | Michael R. Ouellette, Gustavo E. Tellez | 2006-01-31 |
| 6948146 | Simplified tiling pattern method | Robert J. Allen, John M. Cohn, Peter A. Habitz, William C. Leipold, Ivan L. Wemple | 2005-09-20 |
| 6883155 | Macro design techniques to accommodate chip level wiring and circuit placement across the macro | Thomas R. Bednar, Paul E. Dunn, Scott Whitney Gould, Jeannie H. Panner | 2005-04-19 |
| 6883152 | Voltage island chip implementation | Thomas R. Bednar, Scott Whitney Gould, David E. Lackey, Douglas W. Stout | 2005-04-19 |
| 6832361 | System and method for analyzing power distribution using static timing analysis | John M. Cohn, Scott Whitney Gould, Ronald D. Rose, Ivan L. Wemple | 2004-12-14 |
| 6820240 | Voltage island chip implementation | Thomas R. Bednar, Scott Whitney Gould, David E. Lackey, Douglas W. Stout | 2004-11-16 |
| 6779163 | Voltage island design planning | Thomas R. Bednar, Scott Whitney Gould, David E. Lackey, Douglas W. Stout | 2004-08-17 |
| 6731154 | Global voltage buffer for voltage islands | Thomas R. Bednar, Scott Whitney Gould, David E. Lackey, Douglas W. Stout | 2004-05-04 |
| 6725439 | Method of automated design and checking for ESD robustness | Philip S. Homsinger, Andrew D. Huber, Debra K. Korejwa, William J. Livingstone, Jeannie H. Panner +3 more | 2004-04-20 |
| 6651230 | Method for reducing design effect of wearout mechanisms on signal skew in integrated circuit design | John M. Cohn, Jose L. Neves | 2003-11-18 |
| 6543040 | Macro design techniques to accommodate chip level wiring and circuit placement across the macro | Thomas R. Bednar, Paul E. Dunn, Scott Whitney Gould, Jeannie H. Panner | 2003-04-01 |
| 6523154 | Method for supply voltage drop analysis during placement phase of chip design | John M. Cohn, James Venuto, Ivan L. Wemple | 2003-02-18 |
| 6505324 | Automated fuse blow software system | Bruce Cowan, Frank Distler, Mark F. Ollive, Michael R. Ouellette, Jeannie H. Panner +2 more | 2003-01-07 |
| 6490708 | Method of integrated circuit design by selection of noise tolerant gates | John M. Cohn, Scott Whitney Gould, Peter A. Habitz, Jose L. Neves, William F. Smith +1 more | 2002-12-03 |
| 6470476 | Substitution of non-minimum groundrule cells for non-critical minimum groundrule cells to increase yield | Thomas R. Bednar | 2002-10-22 |
| 6194233 | Integrated circuit and method of manufacture for avoiding damage by electrostatic charge | Thomas R. Bedner | 2001-02-27 |
| 6185722 | Three dimensional track-based parasitic extraction | Laura R. Darden, James Engel, Peter A. Habitz, William J. Livingstone, Daniel Joseph Mainiero +2 more | 2001-02-06 |
| 6026224 | Redundant vias | Laura R. Darden, William J. Livingstone, Jeannie H. Panner, Patrick E. Perry, William F. Pokorny | 2000-02-15 |