Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6308302 | Semiconductor wiring technique for reducing electromigration | David J. Hathaway, Douglas W. Kemerer, William J. Livingstone, Joseph Leonard Metz, Jeannie Therese Harrigan Panner | 2001-10-23 |
| 6185722 | Three dimensional track-based parasitic extraction | Laura R. Darden, James Engel, Peter A. Habitz, William J. Livingstone, Jeannie H. Panner +2 more | 2001-02-06 |
| 5737580 | Wiring design tool improvement for avoiding electromigration by determining optimal wire widths | David J. Hathaway, Douglas W. Kemerer, William J. Livingstone, Joseph Leonard Metz, Jeannie Therese Harrigan Panner | 1998-04-07 |