Issued Patents All Time
Showing 251–275 of 548 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10665714 | Vertical transistors with various gate lengths | Kangguo Cheng, Choonghyun Lee, Shogo Mochizuki | 2020-05-26 |
| 10665698 | Reducing gate-induced-drain-leakage current in a transistor by forming an enhanced band gap layer at the channel-to-drain interface | Choonghyun Lee, Kangguo Cheng, Shogo Mochizuki | 2020-05-26 |
| 10658246 | Self-aligned vertical fin field effect transistor with replacement gate structure | Chen Zhang, Tenko Yamashita, Kangguo Cheng, Xin Miao | 2020-05-19 |
| 10658387 | Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation | Kangguo Cheng, Zuoguang Liu, Xin Miao | 2020-05-19 |
| 10658583 | Forming RRAM cell structure with filament confinement | Dexin Kong, Kangguo Cheng, Takashi Ando | 2020-05-19 |
| 10658590 | Techniques for forming RRAM cells | Kangguo Cheng, Dexin Kong, Takashi Ando | 2020-05-19 |
| 10651378 | Resistive random-access memory | Kangguo Cheng, Choonghyun Lee, Peng Xu | 2020-05-12 |
| 10644138 | Fin field-effect transistors with enhanced strain and reduced parasitic capacitance | Kangguo Cheng, Choonghyun Lee, Shogo Mochizuki | 2020-05-05 |
| 10644108 | Strained and unstrained semiconductor device features formed on the same substrate | Kangguo Cheng, Peng Xu | 2020-05-05 |
| 10636887 | Self-limiting fin spike removal | Kangguo Cheng, Choonghyun Lee, Peng Xu | 2020-04-28 |
| 10629431 | Method and structure for forming a dense array of single crystalline semiconductor nanocrystals | Kangguo Cheng, Hong He | 2020-04-21 |
| 10629589 | Resistor fins | Zhenxing Bi, Kangguo Cheng, Peng Xu | 2020-04-21 |
| 10622208 | Lateral semiconductor nanotube with hexagonal shape | Kangguo Cheng, Peng Xu, Choonghyun Lee | 2020-04-14 |
| 10615166 | Programmable device compatible with vertical transistor flow | Kangguo Cheng, Geng Wang, Qintao Zhang | 2020-04-07 |
| 10615278 | Preventing strained fin relaxation | Kangguo Cheng, Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Gauri Karve +3 more | 2020-04-07 |
| 10615159 | Integrated LDMOS and VFET transistors | Kangguo Cheng, Geng Wang, Qintao Zhang | 2020-04-07 |
| 10604407 | Nanoparticle structure and process for manufacture | Qing Cao, Kangguo Cheng | 2020-03-31 |
| 10600889 | Nanosheet transistors with thin inner spacers and tight pitch gate | Kangguo Cheng, Choonghyun Lee, Peng Xu | 2020-03-24 |
| 10600885 | Vertical fin field effect transistor devices with self-aligned source and drain junctions | Kangguo Cheng, Choonghyun Lee, Shogo Mochizuki | 2020-03-24 |
| 10600695 | Channel strain formation in vertical transport FETS with dummy stressor materials | Choonghyun Lee, Kangguo Cheng, Shogo Mochizuki | 2020-03-24 |
| 10593622 | Electrical fuse and/or resistors structures | Veeraraghavan S. Basker, Kangguo Cheng, Ali Khakifirooz | 2020-03-17 |
| 10593672 | Method and structure of forming strained channels for CMOS device fabrication | Kangguo Cheng, John G. Gaudiello | 2020-03-17 |
| 10586858 | Fabrication of vertical field effect transistor structure with strained channels | Kangguo Cheng | 2020-03-10 |
| 10586800 | Anti-fuse with reduced programming voltage | Kangguo Cheng, Chengwen Pei, Geng Wang | 2020-03-10 |
| 10586737 | Method and structure for forming vertical transistors with shared gates and separate gates | Zhenxing Bi, Kangguo Cheng, Peng Xu | 2020-03-10 |